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Date
Author
Subject
Text
12
Tue Oct 6 11:20:39 2009
Stefan Ritt
VDD instability
It has turned out that the stability of
the AVDD and DVDD power supplies for the
DRS4 are very critical. On the evaluation
13
Wed Oct 7 17:58:20 2009
Stefan Ritt
VDD switch off speed
It turned out that the VDD switch off speed
plays some important role. On our VME board,
we have a linear regulator, then a 4.7 uF
16
Fri Oct 16 10:16:10 2009
Stefan Ritt
DSR4 Full Readout Mode
18
Mon Oct 19 09:13:00 2009
Stefan Ritt
BIAS Pin of DRS4
20
Mon Oct 19 12:46:12 2009
Stefan Ritt
output common mode voltage of DRS4
22
Wed Nov 4 14:42:22 2009
Stefan Ritt
outline dimension of DRS4
24
Tue Dec 15 14:38:09 2009
Stefan Ritt
Trigger of DRS4
26
Mon Dec 21 16:52:08 2009
Stefan Ritt
Trigger of DRS4
28
Tue Dec 22 09:07:27 2009
Stefan Ritt
Trigger of DRS4
30
Mon Jan 11 16:32:21 2010
Stefan Ritt
normal_mode_in_drs_exam.cpp
32
Mon Feb 1 08:30:42 2010
Stefan Ritt
Failure In Flashing Xilinx PROM
34
Wed Feb 10 15:35:09 2010
Stefan Ritt
Hello
36
Tue Feb 16 09:38:59 2010
Stefan Ritt
Problem reading oscilloscope binary waveform output
38
Sat Feb 20 09:54:48 2010
Stefan Ritt
PLLLCK signal of DRS4
40
Sun Feb 21 13:41:35 2010
Stefan Ritt
Real Time Conference 2010
Hello,
may I draw your attention to the
upcoming Real Time Conference 2010, taking
41
Sun Feb 21 13:47:03 2010
Stefan Ritt
PLLLCK signal of DRS4
43
Sun Feb 21 20:33:57 2010
Stefan Ritt
PLLLCK signal of DRS4
45
Wed Mar 3 14:37:40 2010
Stefan Ritt
PLLLCK signal of DRS4
47
Wed Mar 3 17:49:30 2010
Stefan Ritt
Initialization of the Domino Circuit
51
Wed Mar 10 10:07:28 2010
Stefan Ritt
Serial Interface Frequency of the DRS Chip
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