| ID |
Date |
Author |
Subject |
Text |
 |
|
524
|
Thu May 12 08:16:41 2016 |
Stefan Ritt | Problem For Software Download | Can you tell me (screendump) what is the
problem on the web site https://www.psi.ch/drs/software-download ?
It should redirect you to |
|
|
525
|
Thu May 12 12:38:17 2016 |
Stefan Ritt | DRS4 Macro to save events | Dear Maksat,
If your car does not run, and you
call the car dealer and tell him "my |
|
|
527
|
Wed Jun 1 23:16:01 2016 |
Stefan Ritt | problems when stop cell >= 767 ?? | I cannot confirm the story with the "stop
capacitor > 767". It can be seen
from your plots that the distribution of |
|
|
530
|
Wed Jun 15 14:49:00 2016 |
Stefan Ritt | problems of DRS4 | 1. Simultaneous writing and reading is
not possible with the DRS4 chip. The manual
says differently on p. 14, but due to a bug |
|
|
531
|
Wed Jun 29 09:10:01 2016 |
Stefan Ritt | Negative input signals | Hello everybody,
I get often asked if the DRS4 evaluation
board can accomodate negative input pulses |
|
|
534
|
Mon Aug 29 10:57:33 2016 |
Stefan Ritt | increment write config register on the fly? | The issue with "stopping at cell 767"
would also affect this mode of operation.
Furthermore, the DRS4 chip has only 10 bit |
|
|
536
|
Mon Aug 29 12:51:48 2016 |
Stefan Ritt | increment write config register on the fly? | The problem is when you change the write
config register from 11111111 to 01111111,
or from 00001111 to 00000111, then the last |
|
|
538
|
Fri Sep 30 17:03:38 2016 |
Stefan Ritt | Output Timing Drifting | Hi Jacob,
you are missing the timing calibration.
Each sampling cell has not the same width. |
|
|
540
|
Thu Oct 6 11:18:05 2016 |
Stefan Ritt | Timestamp for each DRS4 waveform | In the mentioned read_binary.cpp file you
have the line where you read the event header
i = fread(&eh, sizeof(eh), |
|
|
543
|
Sun Oct 9 11:39:18 2016 |
Stefan Ritt | time difference between 2 channels only ~30-35ps @ 5GSmples/s | Can you post a screenshot of your measurement?
Stefan
|
|
|
545
|
Mon Oct 10 12:03:27 2016 |
Stefan Ritt | time difference between 2 channels only ~30-35ps @ 5GSmples/s | Ok, I got it. The timing resolution is
affected by the signal-to-noise ratio over
the rise-time of your signal. You find the |
|
|
547
|
Tue Oct 11 09:20:04 2016 |
Stefan Ritt | time difference between 2 channels only ~30-35ps @ 5GSmples/s | Concerning the offset, it looks to me like
you moved the offset slider slider of channel
1 to a non-zero position. You see that from |
|
|
548
|
Tue Oct 11 22:11:26 2016 |
Stefan Ritt | time difference between 2 channels only ~30-35ps @ 5GSmples/s | Thank you very much! I will check it tomorrow!
-d
Concerning the offset, it looks |
|
|
550
|
Thu Oct 27 08:29:26 2016 |
Stefan Ritt | Problems with DRS command line | [quote="Alexey Lubinets"]Hello, everybody
I have installed the software for the DRS4 |
|
|
552
|
Fri Oct 28 15:51:59 2016 |
Stefan Ritt | Problems with DRS command line | No, I absolutely have no idea. Both DRSOsc
and drscl use exaclty the same code to access
USB.
|
|
|
554
|
Tue Nov 8 10:20:52 2016 |
Stefan Ritt | Missing Header | The web page from where you downloaded
the software contains a sentence "requires
libusb-1.0 package". Please install |
|
|
556
|
Wed Nov 9 19:49:07 2016 |
Stefan Ritt | Missing Header | Best is to read this paper: https://arxiv.org/abs/1405.4975
The source code for that is in
DRS.cpp in the DRS software distribution |
|
|
558
|
Thu Nov 10 09:56:04 2016 |
Stefan Ritt | Break Statements in DRS4 Binary to ROOT Macro | Hi,
fread() returns the number of bytes
read and zero (I believe) if there is an |
|
|
562
|
Thu Nov 10 22:07:40 2016 |
Stefan Ritt | Break Statements in DRS4 Binary to ROOT Macro | You're right, fread() return the number
of objects read, so indeed it should be one
if successful. |
|
|
565
|
Mon Nov 21 14:13:32 2016 |
Stefan Ritt | Channel offsets in GetTime() | Cell 700 is arbitrary. You can choose any
cell to align the channels to each other.
The only requirement is that it's always |
|