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+    Fri Oct 13 03:39:01 2017, Jonathan Wapman, Raspberry Pi Connection Failure  +    Thu May 8 23:23:19 2025, Jonathan Bradshaw, Clarification of full channel readout  +    Thu May 8 23:41:03 2025, Jonathan Bradshaw, Handling of Write Shift Register and Write Config Register     +    Tue May 13 04:10:30 2025, Jonathan Bradshaw, Handling of Write Shift Register and Write Config Register     +    Thu May 15 00:01:20 2025, Jonathan Bradshaw, Handling of Write Shift Register and Write Config Register  +    Wed Oct 25 19:44:25 2023, John Westmoreland, WaveDREAM Design     +    Wed Oct 25 19:52:33 2023, John Westmoreland, WaveDREAM Design  +    Wed Oct 23 17:56:26 2019, John Jendzurski, Computing corrected time from binary data...what is t_0,0?  +    Fri Oct 16 09:51:03 2009, Jinhong Wang, DSR4 Full Readout Mode  +    Mon Oct 19 09:06:43 2009, Jinhong Wang, BIAS Pin of DRS4  +    Mon Oct 19 11:26:29 2009, Jinhong Wang, output common mode voltage of DRS4  +    Fri Oct 30 03:31:54 2009, Jinhong Wang, outline dimension of DRS4  +    Mon Dec 14 10:14:16 2009, Jinhong Wang, Trigger of DRS4     +    Mon Dec 21 10:17:05 2009, Jinhong Wang, Trigger of DRS4     +    Tue Dec 22 01:30:55 2009, Jinhong Wang, Trigger of DRS4     +    Wed May 12 11:47:39 2010, Jinhong Wang, DRS4 chip model     +    Fri Jun 18 11:31:20 2010, Jinhong Wang, DVDD Problem of DRS 4     +    Sat Jun 19 10:09:18 2010, Jinhong Wang, DVDD Problem of DRS 4  +    Tue Jun 22 10:50:19 2010, Jinhong Wang, Reset of DRS4     +    Tue Jun 22 11:29:26 2010, Jinhong Wang, Reset of DRS4

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