ID |
Date |
Author |
Subject |
Text |
 |
763
|
Mon Jul 15 19:34:25 2019 |
Brendan Posehn | Evaluation Board Test Functionality | Hello Stefan,
Thanks for the quick reply. The
issue was a faulty SMA connector, should |
|
276
|
Tue Jul 23 22:31:08 2013 |
alonzi | Evaluation Board Behavior | Working with the DRS evaluation board we
noticed some funny behavior: See attatchment
1. In about 1% of scope traces we see the |
 |
277
|
Tue Jul 23 22:35:08 2013 |
Stefan Ritt | Evaluation Board Behavior |
|
|
278
|
Tue Jul 23 22:42:31 2013 |
alonzi | Evaluation Board Behavior |
|
|
279
|
Thu Jul 25 01:31:29 2013 |
Andrey Kuznetsov | Evaluation Board Behavior |
|
|
908
|
Tue May 21 18:13:08 2024 |
Rebecca Hicks | Error when running drsosc | Hi, I'm a student trying to figure
out the DRS4 board. I cloned the github repo,
but when I run drsosc, I get an error: Gtk-Message: |
|
909
|
Fri Jun 28 23:33:51 2024 |
Patricia Lecomti | Error when running drsosc | Salut !
Je vois que tu rencontres un petit
problème avec ton installation. Le |
|
708
|
Mon Jul 16 19:39:35 2018 |
Woon-Seng Choong | Effect of interpolation on timing | Using a test pulse split into two channels
of the DRS4 Evaluation Board v5, I looked
at the time resolution using a leading edge |
|
709
|
Fri Jul 20 00:44:13 2018 |
Woon-Seng Choong | Effect of interpolation on timing | Just a follow-up update.
It turns out that I was using a
cubic spline interpolation with smoothing. |
|
204
|
Thu Dec 6 09:23:36 2012 |
Martin Petriska | EVM rev4 board trigger change and drs_example | I switched from rev 3 to rev 4 board,
but have some problems with triggering, board
is now waiting for trigger (rev.3 is working). |
|
211
|
Fri Dec 14 21:49:29 2012 |
Stefan Ritt | EVM rev4 board trigger change and drs_example |
|
|
793
|
Sat Aug 29 22:00:30 2020 |
Hans Steiger | Dynamic Range Evaluation Board and Software | Dear Evaluation Board Team,
currently I am facing the problem |
|
794
|
Mon Aug 31 10:52:42 2020 |
Stefan Ritt | Dynamic Range Evaluation Board and Software | You cannot go below -0.5V for the inputs,
since the board does not have an internal
negative power supply, which would be necessary |
|
457
|
Wed Dec 23 15:38:14 2015 |
mony orbach | Dtap stops toggling after 40msec | Hi
the drs4 start to generate Dtap
signal after reset and standard configuration. |
|
458
|
Wed Dec 23 15:48:42 2015 |
Stefan Ritt | Dtap stops toggling after 40msec | No idea what you do wrong. I need to see
oscilloscope traces for all your inputs and
voltages. What is your REFCLK input? |
|
459
|
Thu Dec 24 10:51:31 2015 |
mony orbach | Dtap stops toggling after 40msec | my refclk is 1.25Mhz
what are the inputs and voltage
you need to see? |
|
460
|
Thu Dec 24 12:45:41 2015 |
Stefan Ritt | Dtap stops toggling after 40msec | I want to see the trace on the scope for
the DTAP, the REFCLK, the DENABLE and the
DWRITE. |
|
Draft
|
Sun Dec 27 15:06:59 2015 |
mony orbach | Dtap stops toggling after 40msec | Hi
We have some meesurs to show (attached)
Dtap and Denable
Dtap+Denable |
|
462
|
Sun Dec 27 15:41:32 2015 |
mony orbach | Dtap stops toggling after 40msec | Hi
We have some measures to show (attached)
Dtap and Denable
Dtap+Denable |
   |
463
|
Mon Dec 28 11:05:15 2015 |
Stefan Ritt | Dtap stops toggling after 40msec | Thanks for posting the plots. It really
looks like the PLL is not working. I see
two possible reasons: 1) The PLLEN bit in |
|