| ID |
Date |
Author |
Subject |
Text |
 |
|
116
|
Fri Feb 25 10:13:51 2011 |
Stefan Ritt | Announcement digital pulse processing workshop | Dear colleague,
if you live not so far from Zurich,
you might be interested in this workshop: |
|
|
6
|
Mon Apr 27 15:09:49 2009 |
Stefan Ritt | Amplitude and Timing calibration for DRS4 Evaluation Board | This is a quick notification to all users
of the current DRS4 evaluation board.
As you all know, the DRS4 chip needs |
|
|
584
|
Sat Jan 28 14:11:58 2017 |
Danny Petschke | AND trigger problems | Dear Stefan,
I have 2 identical pulses as a
splittet signal with an amplitude of 300mV. |
|
|
585
|
Mon Jan 30 16:37:33 2017 |
Stefan Ritt | AND trigger problems | In the evaluation board we use an ADCMP601
comparator, which has a setup and hold time
of 4.6 ns. So a pulse which exceeds the threshold |
|
|
616
|
Thu Jun 8 14:26:23 2017 |
Rebecca Schmitz | AND Trigger problems with 2-3 channels | Hello,
I work with the DRS4 Evaluation
Board V5 and I have a problem with the software. |
|
|
617
|
Thu Jun 8 15:52:20 2017 |
Stefan Ritt | AND Trigger problems with 2-3 channels | Can you post a screenshot where I can see
the channel waveforms, the configuration
and the trigger settings? |
|
|
618
|
Fri Jun 9 09:44:33 2017 |
Rebecca Schmitz | AND Trigger problems with 2-3 channels | Hello,
It
seems that a coincidence with two fixed channels |
|
|
620
|
Thu Jun 22 21:36:08 2017 |
Stefan Ritt | AND Trigger problems with 2-3 channels | Hi,
from our screenshots I see the
following: |
|
|
364
|
Thu Aug 21 11:03:36 2014 |
Martin Petriska | 10GSps on DRS4 Evm with delay cables | Hi, I read its possible to use channels
2,4,6 to extend 200ns to 400ns (1024bins
to 2048). |
|
|
365
|
Tue Aug 26 12:32:21 2014 |
Stefan Ritt | 10GSps on DRS4 Evm with delay cables |
|
|
|
697
|
Thu May 17 13:29:34 2018 |
Stefan Ritt | "Symmetric spikes" fixed | Good news for all DRS4 users. After many
years, I finally understand where the "symmetric
spikes" come from and how to fix them. |
|
|
714
|
Mon Sep 3 11:17:26 2018 |
Martin Petriska | "Symmetric spikes" fixed | Hi,
Is it possible to fix it by FPGA
changes? I see readout cycle (proc_drs_reedout) in |
|
|
715
|
Tue Sep 4 13:04:30 2018 |
Stefan Ritt | "Symmetric spikes" fixed | Yes it's possible, but I have to find
time for that. The software of the evaluation
board takes care of the spikes ("remove |
|
|
716
|
Thu Sep 13 18:09:13 2018 |
Martin Petriska | "Symmetric spikes" fixed | Ok, so I made it ... and Yes it works :),
https://youtu.be/0noy4CoFoh8
here is changed part in drs4_eval4_app.vhd |
|
|
106
|
Wed Jul 21 10:46:32 2010 |
Jinhong Wang | ENOB of DRS | Hi, Stefan, I see in your ppt "Design
and performance of 6 GSPS waveform digitizing
chip DRS4" , you define DRS4 ENOB as |
|
|
107
|
Wed Jul 21 10:58:20 2010 |
Stefan Ritt | ENOB of DRS |
|
|
|
402
|
Thu Apr 9 11:46:33 2015 |
Felix Bachmair | DRSBoard::SetTriggerSource | Hi
I have a question about the function
SetTriggerSource in the class DRSBoard (DRS.h/DRS.cpp) |
|
|
405
|
Tue Apr 21 12:01:45 2015 |
Stefan Ritt | DRSBoard::SetTriggerSource | Your first assumption is correct, e.g.
source = 00000000'00000001
= 0x0001 ==> CH1 |
|
|
257
|
Sun May 26 13:08:52 2013 |
tmiron alon | | Hallo,
I'm using DRS4 Evaluation Board Rev
4.0 and I'm trying to change the output |
|
|
258
|
Fri Jun 7 10:22:48 2013 |
Stefan Ritt | |
|
|