ID |
Date |
Author |
Subject |
Text |
 |
451
|
Wed Nov 25 02:52:35 2015 |
Chris Thompson | PC software beyond Windows 7 | I am new to this forum. I have ordered
a DRS4 evaluation board for doing experiments
with very fast PET detectors. It has not |
|
452
|
Wed Nov 25 08:20:47 2015 |
Stefan Ritt | PC software beyond Windows 7 | Have a look here elog:434
|
|
453
|
Wed Nov 25 17:36:25 2015 |
Chris Thompson | PC software beyond Windows 7 | I tried this suggestion of changing the
startup settings to ingore driver license
signing (as suggested in the post # 434), |
|
455
|
Sat Dec 5 02:39:20 2015 |
Chris Thompson | PC software beyond Windows 7 | I tried restarting Windows 10 in a way
the allowed me to use "advanced startup
options" Option 7 suggested it was to |
|
456
|
Sat Dec 5 03:21:21 2015 |
Chris Thompson | PC software beyond Windows 7 | On a hunch, I tried downloading V 5.0.3
instead. This works, and I now have the oscilloscope
mode displaying signals! (just to make sure, |
|
468
|
Tue Jan 12 12:57:46 2016 |
Stefan Ritt | PC software beyond Windows 7 | The 5.0.4 version was corrupt on our server.
I fixed it, so now it shoudl also work fine
(although there are only very minor changes |
|
537
|
Thu Sep 29 17:26:13 2016 |
Jacob Hwang | Output Timing Drifting | Hello,
I have designed four DRS4 chips
(36 channels) on my board running at 1GHz |
|
538
|
Fri Sep 30 17:03:38 2016 |
Stefan Ritt | Output Timing Drifting | Hi Jacob,
you are missing the timing calibration.
Each sampling cell has not the same width. |
|
710
|
Wed Aug 1 00:49:30 2018 |
Sean Quinn | Optimal readout speed | Dear DRS4 team,
On page 3 of the data sheet, Table
1. for readout speed a typical value of 10 |
|
713
|
Tue Aug 21 14:36:44 2018 |
Stefan Ritt | Optimal readout speed | The analog output of the DRS4 chip needs
some time to settle. In principle it need
an infinite amout of time (exponential curve) |
|
217
|
Wed Feb 13 16:58:40 2013 |
Martin Petriska | Nonuniform sampling | Are there any plans to include reconstruction
of nonuniform sampling in DRS4 to get
uniformly sampled data? |
|
218
|
Wed Feb 13 17:03:53 2013 |
Stefan Ritt | Nonuniform sampling |
|
|
916
|
Thu Mar 27 15:53:10 2025 |
Justin Tabbett | Noisy counts with adapted drs_exam.cpp | Greetings,
I have adapted the drs_exam.cpp
to allow for a user input number of channels |
 |
519
|
Thu Apr 28 15:47:53 2016 |
Stefan Ritt | New software version and binary format | A new software version 5.0.5 has been released
today. This fixes a few bugs in multi-board
configurations, and adds saving of the scaler |
|
531
|
Wed Jun 29 09:10:01 2016 |
Stefan Ritt | Negative input signals | Hello everybody,
I get often asked if the DRS4 evaluation
board can accomodate negative input pulses |
|
509
|
Thu Apr 21 22:16:43 2016 |
Kyle Weinfurther | Negative fCellDT values from GetTimeCalibration() | Hello Stefan,
I am using four DRS4 v5 eval boards
to digitize 16 channels of data. I have recently |
  |
511
|
Sat Apr 23 12:33:17 2016 |
Daniel Stricker-Shaver | Negative fCellDT values from GetTimeCalibration() | Hi Kyle,
If I remember right the negative
sampling width happens only for 498 and at |
|
512
|
Tue Apr 26 09:54:16 2016 |
Stefan Ritt | Negative fCellDT values from GetTimeCalibration() | I just realized that the negative bin widht
is not explicitly mentioned in the quoted
paper. So let me explain it here: |
|
706
|
Thu Jun 28 19:55:45 2018 |
Woon-Seng Choong | Negative Bin Width | I am using a DRS4 Evaluation Board v5 and
running the drsosc.exe version 5.06 on
a Window 7 machine. I have performed the |
 |
707
|
Fri Jun 29 07:51:33 2018 |
Stefan Ritt | Negative Bin Width | Yes that's normal. A negative cell
bin width means that the next cell N+1 samples
the input signal before cell N. This can |
|