| ID |
Date |
Author |
Subject |
Text |
 |
|
746
|
Wed Mar 6 10:09:01 2019 |
Willy Chang | drscl "no board found" in some Win7 or Win8.X PCs | Hi all,
When connecting the board and running
the Zadig program, some Windows PCs may return "driver |
|
|
706
|
Thu Jun 28 19:55:45 2018 |
Woon-Seng Choong | Negative Bin Width | I am using a DRS4 Evaluation Board v5 and
running the drsosc.exe version 5.06 on
a Window 7 machine. I have performed the |
|
|
708
|
Mon Jul 16 19:39:35 2018 |
Woon-Seng Choong | Effect of interpolation on timing | Using a test pulse split into two channels
of the DRS4 Evaluation Board v5, I looked
at the time resolution using a leading edge |
|
|
709
|
Fri Jul 20 00:44:13 2018 |
Woon-Seng Choong | Effect of interpolation on timing | Just a follow-up update.
It turns out that I was using a
cubic spline interpolation with smoothing. |
|
|
629
|
Wed Sep 27 16:11:03 2017 |
Yoni Sher | Event acquisition pace for irregular timing | Hi,
I'm running a LIDAR application
that requires that every outgoing pulse be |
|
|
647
|
Wed Dec 20 15:30:38 2017 |
Yoni Sher | cascading -- DRS4 Osci.cpp & DRS.cpp | Hi,
I'm trying to do the same thing
(get 1 channel with 8192 bins), but I'm |
|
|
649
|
Wed Dec 20 16:30:45 2017 |
Yoni Sher | cascading -- DRS4 Osci.cpp & DRS.cpp | Hi,
The board is modified (and checks
out with the DRSScope program). Could you |
|
|
523
|
Thu May 12 05:18:47 2016 |
Yu | Problem For Software Download | Hi
I can't download the
software for windows on this website 'www.psi.ch/drs/software-download', |
|
|
153
|
Wed Feb 15 18:08:13 2012 |
Yuji Iwai | Evaluation Board v4 Trigger/Clock Connectors | Quick question - what type of connectors
are used for the trigger and clock in/out
on the v4 eval board? |
|
|
219
|
Fri Feb 22 11:46:17 2013 |
Yury Golod | DRS4 trigger, different polarity |
Normal
0
|
|
|
628
|
Sun Aug 27 12:44:16 2017 |
Yuvaraj Elangovan | DRS4 version Support | Hi i am using DRS4 Eval Board V2, How to
acquire data to a bin file using it.
|
|
|
358
|
Mon Jul 14 19:03:05 2014 |
Yves Bianga | change cascading from 1024 to 2048 bins for each input channel | Hello,
I want to ask
whether it is possible to modify a Evaluation |
|
|
175
|
Tue Aug 28 17:52:45 2012 |
Zach Miller | DRS-4.0.0 DOScreen.cpp | Hi,
I found an old thread regarding a
fix for DOScreen.cpp for DRS-3.1.0, that |
|
|
177
|
Wed Aug 29 16:42:42 2012 |
Zach Miller | DRS-4.0.0 DOScreen.cpp |
|
|
|
179
|
Wed Aug 29 16:57:49 2012 |
Zach Miller | DRS-4.0.0 DOScreen.cpp |
|
|
|
180
|
Thu Oct 4 20:50:36 2012 |
Zach Miller | DRS5 | Hi,
Our group had previously heard that
a "DRS-5.0" might be on the horizon |
|
|
182
|
Thu Oct 4 21:07:27 2012 |
Zach Miller | DRS5 |
|
|
|
136
|
Mon Oct 31 09:15:02 2011 |
Zhongwei Du | How to link PMT | I want to measure the signal from PMT .
But it is a current signal, should i just
put a series resistance, or use a amplifier |
|
|
151
|
Sat Feb 4 11:59:26 2012 |
Zhongwei Du | what sort of detectors for physical experiment the DRS4 used? | Hello.
We are designing a waveform
sampling board for Si strip array detector |
|
|
200
|
Tue Dec 4 09:24:22 2012 |
Zhongwei Du | Question of drs4 using | When Denable and Dwrite is high , the voltage
of PLLOUT is 0 V. And the Dtap
is turn high with no delay when the Denable |
|