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+    Wed Oct 28 04:32:19 2020, Seiya Nozaki, Timing diagram of SROUT/SRIN signal to write/read a write shift register     +    Wed Oct 7 11:17:52 2020, Elmer Grundeman, External triggering     +    Mon Aug 31 17:17:30 2020, Stefan Ritt, Channel Cascading     +    Mon Aug 31 10:52:42 2020, Stefan Ritt, Dynamic Range Evaluation Board and Software     +    Tue Jul 28 22:40:44 2020, Razvan Stefan Gornea, no board found     +    Tue May 26 12:44:16 2020, Stefan Ritt, Domino wave     +    Mon May 25 03:36:12 2020, Keita Mizukoshi, DRS4 Evaluation board control tool 'drscl' with macro file     +    Fri May 22 13:24:51 2020, Stefan Ritt, Type check at DOFrame.h in official software    Mon Mar 23 15:03:28 2020, Ajay Krishnamurthy, USB trigger issue     +    Fri Oct 25 16:39:07 2019, Stefan Ritt, Computing corrected time from binary data...what is t_0,0?     +    Tue Oct 15 08:14:17 2019, Danyang, how to acquire the stop position with channel cascading    Fri Sep 13 15:27:41 2019, Arseny Rybnikov, Scaler / How to modify the firmware to change the scaler integration time     +    Tue Aug 27 09:14:03 2019, Stefan Ritt, DRS4     +    Tue Aug 20 16:05:21 2019, Bill Ashmanskas, should one deassert DENABLE while writing the write-shift register?     +    Sat Jul 20 12:28:14 2019, Stefan Ritt, Trace Impedance     +    Mon Jul 15 19:34:25 2019, Brendan Posehn, Evaluation Board Test Functionality     +    Mon Jul 8 14:29:12 2019, Stefan Ritt, drs_exam is always reading out a sin wave     +    Wed Jun 26 15:17:51 2019, Si Xie, Running drs_example.cpp     +    Mon Jun 24 23:07:35 2019, Andrew Peck, Evaluation firmware wait_vdd state     +    Fri Apr 12 12:50:18 2019, Stefan Ritt, multi-board

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