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ID
Date
Author
Subject
Text
41
Sun Feb 21 13:47:03 2010
Stefan Ritt
PLLLCK signal of DRS4
42
Sun Feb 21 20:27:46 2010
Hao Huan
PLLLCK signal of DRS4
43
Sun Feb 21 20:33:57 2010
Stefan Ritt
PLLLCK signal of DRS4
44
Mon Feb 22 17:23:59 2010
Hao Huan
PLLLCK signal of DRS4
45
Wed Mar 3 14:37:40 2010
Stefan Ritt
PLLLCK signal of DRS4
46
Wed Mar 3 17:36:31 2010
Hao Huan
Initialization of the Domino Circuit
Hi Stefan,
I read in the
datasheet that every time after power up
47
Wed Mar 3 17:49:30 2010
Stefan Ritt
Initialization of the Domino Circuit
48
Thu Mar 4 19:14:10 2010
Hao Huan
Readout of DRS Data
Hi Stefan,
thanks to your
help I can now successfully keep the Domino
49
Fri Mar 5 23:29:04 2010
Hao Huan
Readout of DRS Data
50
Tue Mar 9 23:28:45 2010
Hao Huan
Serial Interface Frequency of the DRS Chip
Hi Stefan,
in the DRS4 datasheet
I read that the optimal frequency for SRCLK
51
Wed Mar 10 10:07:28 2010
Stefan Ritt
Serial Interface Frequency of the DRS Chip
52
Thu Mar 11 11:45:52 2010
Stefan Ritt
Readout of DRS Data
53
Thu Mar 11 21:37:32 2010
Hao Huan
Input Bandwidth of the DRS Chip
Hi Stefan,
I read in the
DRS datasheet that the input bandwidth if
54
Fri Mar 12 08:04:44 2010
Stefan Ritt
Input Bandwidth of the DRS Chip
55
Thu Mar 18 21:38:10 2010
Hao Huan
Serial Interface Frequency of the DRS Chip
56
Thu Mar 18 22:10:41 2010
Stefan Ritt
Serial Interface Frequency of the DRS Chip
57
Sun Mar 21 02:03:44 2010
Hao Huan
PLL Loop Filter Configuration
Hi Stefan,
in the datasheet
it says at 6GSPS the typical loop filter
58
Mon Mar 22 09:12:19 2010
Stefan Ritt
PLL Loop Filter Configuration
59
Tue Mar 30 22:57:34 2010
Hao Huan
ROFS Configuration
Hi Stefan,
according to the
DRS4 datasheet, if we want an input range
60
Mon Apr 5 17:50:39 2010
Heejong Kim
version 1.2 evaluation board with firmware 13279?
Hi, Stefan,
I found that my collaborator
bought 2 older version of evaluation board
before.
They are the version 1.2 in plastics
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