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Entry  Thu Jun 8 14:26:23 2017, Rebecca Schmitz, AND Trigger problems with 2-3 channels 
    Reply  Thu Jun 8 15:52:20 2017, Stefan Ritt, AND Trigger problems with 2-3 channels 
       Reply  Fri Jun 9 09:44:33 2017, Rebecca Schmitz, AND Trigger problems with 2-3 channels Screenshot1.pngScreenshot2.pngScreenshot3.png
          Reply  Thu Jun 22 21:36:08 2017, Stefan Ritt, AND Trigger problems with 2-3 channels 
Entry  Tue May 30 20:45:30 2017, Esperienza Giove, Setting input range 
    Reply  Tue May 30 21:00:26 2017, Stefan Ritt, Setting input range 
       Reply  Tue May 30 21:22:10 2017, Esperienza Giove, Setting input range 
Entry  Mon May 22 18:27:56 2017, Esperienza Giove, Invalid magic number 0000 
    Reply  Tue May 23 10:24:47 2017, Stefan Ritt, Invalid magic number 0000 
       Reply  Thu May 25 20:17:41 2017, Esperienza Giove, Invalid magic number 0000 
          Reply  Fri May 26 08:48:25 2017, Stefan Ritt, Invalid magic number 0000 
       Reply  Thu May 25 20:20:57 2017, Esperienza Giove, Invalid magic number 0000 
Entry  Sat Apr 15 03:48:31 2017, Strahinja Lukic, Wave rotation during transfer from the board? 
    Reply  Wed Apr 19 12:17:25 2017, Stefan Ritt, Wave rotation during transfer from the board? 
       Reply  Thu Apr 20 06:30:13 2017, Strahinja Lukic, Wave rotation during transfer from the board? 
Entry  Thu Apr 13 16:42:21 2017, Christian Farina, Stand-alone Time Calibration for PSI Board 
    Reply  Thu Apr 13 16:50:18 2017, Stefan Ritt, Stand-alone Time Calibration for PSI Board 
       Reply  Thu Apr 13 16:54:32 2017, Christian Farina, Stand-alone Time Calibration for PSI Board 
          Reply  Thu Apr 13 17:02:01 2017, Stefan Ritt, Stand-alone Time Calibration for PSI Board 
             Reply  Thu Apr 13 17:10:58 2017, Christian Farina, Stand-alone Time Calibration for PSI Board 
Entry  Mon Apr 10 08:50:11 2017, Giovanni Bruni, drs4 registers behaviour 
    Reply  Mon Apr 10 10:50:57 2017, Stefan Ritt, drs4 registers behaviour 
       Reply  Mon Apr 10 13:41:41 2017, Giovanni Bruni, drs4 registers behaviour 
          Reply  Mon Apr 10 14:05:17 2017, Stefan Ritt, drs4 registers behaviour 
             Reply  Tue Apr 11 09:07:33 2017, Giovanni Bruni, drs4 registers behaviour 
                Reply  Tue Apr 11 09:41:44 2017, Stefan Ritt, drs4 registers behaviour 
Entry  Wed Apr 5 12:40:16 2017, Martin Petriska, DRS4 eval board v4 coincidence firmware changes for triger for short pulses 
    Reply  Mon Apr 10 10:48:03 2017, Stefan Ritt, DRS4 eval board v4 coincidence firmware changes for triger for short pulses 
Entry  Fri Feb 24 17:34:28 2017, Tarik Zengin, Passing parameters to drscl 
    Reply  Fri Feb 24 18:35:38 2017, Stefan Ritt, Passing parameters to drscl 
Entry  Tue Jan 31 01:37:35 2017, VO HONG HAI, LLD and ULD discriminations, 
    Reply  Tue Jan 31 08:40:04 2017, Stefan Ritt, LLD and ULD discriminations, 
Entry  Sat Jan 28 14:11:58 2017, Danny Petschke, AND trigger problems  
    Reply  Mon Jan 30 16:37:33 2017, Stefan Ritt, AND trigger problems  
Entry  Fri Jan 13 12:58:22 2017, Gregor Kramberger, DRS software doesn't work under Windows XP SP3 
    Reply  Fri Jan 13 13:16:09 2017, Stefan Ritt, DRS software doesn't work under Windows XP SP3 
    Reply  Fri Jan 13 13:50:10 2017, Stefan Ritt, DRS software doesn't work under Windows XP SP3 
Entry  Wed Nov 23 08:17:23 2016, Abhishek Rajput, Potential Incorrect Timing Calibration for DRS4 Data 
    Reply  Thu Nov 24 13:24:26 2016, Stefan Ritt, Potential Incorrect Timing Calibration for DRS4 Data drs.pdf
       Reply  Tue Nov 29 23:19:06 2016, Abhishek Rajput, Potential Incorrect Timing Calibration for DRS4 Data 
          Reply  Wed Nov 30 08:53:58 2016, Stefan Ritt, Potential Incorrect Timing Calibration for DRS4 Data 
             Reply  Fri Dec 9 04:17:46 2016, Abhishek Rajput, Potential Incorrect Timing Calibration for DRS4 Data 
Entry  Wed Nov 30 17:48:39 2016, samridha kunwar, DRS4 Initiation 
    Reply  Wed Nov 30 19:05:24 2016, Stefan Ritt, DRS4 Initiation 
       Reply  Fri Dec 2 15:32:52 2016, samridha kunwar, DRS4 Initiation 
          Reply  Fri Dec 2 16:47:37 2016, Stefan Ritt, DRS4 Initiation 
Entry  Mon Nov 28 22:28:34 2016, Randall Gladen, Long timing between two channels 
    Reply  Wed Nov 30 10:45:29 2016, Stefan Ritt, Long timing between two channels 
Entry  Thu Nov 24 00:40:38 2016, Alexey Lubinets, PLL did not lock 
    Reply  Thu Nov 24 08:13:23 2016, Stefan Ritt, PLL did not lock 
       Reply  Mon Nov 28 16:48:15 2016, Alexey Lubinets, PLL did not lock 
          Reply  Mon Nov 28 16:52:38 2016, Stefan Ritt, PLL did not lock 
Entry  Fri Nov 18 05:52:45 2016, Kurtis Nishimura, Channel offsets in GetTime() offsetInstructions.png
    Reply  Mon Nov 21 14:13:32 2016, Stefan Ritt, Channel offsets in GetTime() 
Entry  Wed Mar 9 09:57:20 2016, Christian D, LabView 
    Reply  Fri Nov 18 16:38:42 2016, Gerard Montarou, LabView 
Entry  Thu Nov 10 04:41:24 2016, Abhishek Rajput, Break Statements in DRS4 Binary to ROOT Macro 
    Reply  Thu Nov 10 09:56:04 2016, Stefan Ritt, Break Statements in DRS4 Binary to ROOT Macro 
       Reply  Thu Nov 10 19:24:52 2016, Abhishek Rajput, Break Statements in DRS4 Binary to ROOT Macro 
          Reply  Thu Nov 10 22:07:40 2016, Stefan Ritt, Break Statements in DRS4 Binary to ROOT Macro 
Entry  Fri Nov 4 17:41:03 2016, Christian Farina, Missing Header 
    Reply  Tue Nov 8 10:20:52 2016, Stefan Ritt, Missing Header 
       Reply  Wed Nov 9 17:19:48 2016, Christian Farina, Missing Header 
          Reply  Wed Nov 9 19:49:07 2016, Stefan Ritt, Missing Header 
             Reply  Thu Nov 10 20:54:45 2016, Christian Farina, Missing Header 
Entry  Wed Oct 26 21:15:35 2016, Alexey Lubinets, Problems with DRS command line 
    Reply  Thu Oct 27 08:29:26 2016, Stefan Ritt, Problems with DRS command line 
       Reply  Fri Oct 28 15:02:18 2016, Simon Mendisch, Problems with DRS command line 
          Reply  Fri Oct 28 15:51:59 2016, Stefan Ritt, Problems with DRS command line 
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