| ID |
Date |
Author |
Subject |
Text |
 |
|
807
|
Wed Jan 20 12:14:49 2021 |
Taegyu Lee | drs4 persistence | Dear all,
I have a question about the function that
drs4 can perform. |
|
|
806
|
Thu Dec 17 11:31:34 2020 |
Stefan Ritt | drs sources on github? | Not github, but bitbucket: https://bitbucket.org/ritt/drs4eb/src/master/
But development kind of stalled, so there |
|
|
805
|
Thu Dec 17 09:29:43 2020 |
Alex Myczko | drs sources on github? | Are there plans to add the drs software to
github? (asking because I have users @ethz.ch
that want to use it on debian,
|
|
|
804
|
Wed Oct 28 04:32:19 2020 |
Seiya Nozaki | Timing diagram of SROUT/SRIN signal to write/read a write shift register | Dear Stefan,
OK, it's good to hear! Thank you! |
|
|
803
|
Tue Oct 27 15:24:38 2020 |
Stefan Ritt | Timing diagram of SROUT/SRIN signal to write/read a write shift register | This is a static shift register, so you
can make the clock as slow as you want. Actually
I don't use a "clock", I just |
|
|
802
|
Tue Oct 27 15:02:09 2020 |
Seiya Nozaki | Timing diagram of SROUT/SRIN signal to write/read a write shift register | Dear Stefan,
Thank you for your reply. |
|
|
801
|
Tue Oct 27 13:37:23 2020 |
Stefan Ritt | Timing diagram of SROUT/SRIN signal to write/read a write shift register | Dear Seiya,
1) That's correct. SRIN is
ampled at the falling edge. Pleae make sure |
|
|
800
|
Wed Oct 21 15:03:13 2020 |
Seiya Nozaki | Timing diagram of SROUT/SRIN signal to write/read a write shift register | Dear Stefan,
I have questions about the timing |
|
|
799
|
Wed Oct 7 11:17:52 2020 |
Elmer Grundeman | External triggering | I will try that, thanks!
|
|
|
798
|
Wed Oct 7 10:56:03 2020 |
Stefan Ritt | External triggering | The trigger is there only to trigger the
chip, but cannot be used as a precise time
reference. If you want to measure precise |
|
|
797
|
Tue Sep 22 17:45:26 2020 |
Elmer Grundeman | External triggering | Dear all,
I had a question about timing jitter
and external triggering. |
|
|
796
|
Mon Aug 31 17:17:30 2020 |
Stefan Ritt | Channel Cascading | If you have a board with cascading option,
it should show the "combined" option
in the 2048-bin option enabled (not grayed), |
|
|
795
|
Mon Aug 31 16:44:12 2020 |
Hans Steiger | Channel Cascading | Dear All,
I have a board with Channel Cascading
Option. I have the problem, that it seems |
|
|
794
|
Mon Aug 31 10:52:42 2020 |
Stefan Ritt | Dynamic Range Evaluation Board and Software | You cannot go below -0.5V for the inputs,
since the board does not have an internal
negative power supply, which would be necessary |
|
|
793
|
Sat Aug 29 22:00:30 2020 |
Hans Steiger | Dynamic Range Evaluation Board and Software | Dear Evaluation Board Team,
currently I am facing the problem |
|
|
792
|
Tue Jul 28 22:40:44 2020 |
Razvan Stefan Gornea | no board found | I have a very similar problem, the command
line doesn't work but the oscilloscope
program does! Tried to fix it using Zadig |
|
|
791
|
Tue May 26 12:44:16 2020 |
Stefan Ritt | Domino wave | Look at the attached picture. For simplicity,
only 4 cells are open and tracking the input
signal. Time is flowing from top to bottom. |
|
|
790
|
Tue May 26 11:10:27 2020 |
xggg | Domino wave | Hi Stefan,
According to the datasheet DRS_rev09,
the write signal is always 16 cells wide. |
|
|
789
|
Mon May 25 03:36:12 2020 |
Keita Mizukoshi | DRS4 Evaluation board control tool 'drscl' with macro file | Thank you very much. That is what I wanted.
|
|
|
788
|
Fri May 22 13:24:51 2020 |
Stefan Ritt | Type check at DOFrame.h in official software | The software is a bit outdated, I will
soon make a new release.
In meantime, you can replace that |
|