 Tue Aug 26 14:16:26 2014, Roman Gredig, binary files with more than 4 drs board ver. 5.0.2
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Dear Stefan
after having some problems with writing binary files with more than 4 drs boards (in multiboard-mode) I might
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 Thu Oct 16 16:15:16 2014, Stefan Ritt, binary files with more than 4 drs board ver. 5.0.2
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> Dear Stefan
>
> after having some problems with writing binary files with more than 4 drs boards (in multiboard-mode) I might
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Wed Aug 13 20:17:19 2014, Roman Gredig, binary files time calibration header in drs-5.0.2
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Dear Stefan
I have a problem considering binary data files.
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Thu Oct 16 16:16:12 2014, Stefan Ritt, binary files time calibration header in drs-5.0.2
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> Dear Stefan
>
> I have a problem considering binary data files.
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Sun Oct 19 14:36:54 2014, Chris Tully, coverting the xml file format into binary
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Hi,
Is there a straightforward way to convert the xml file format into the binary format? I have some runs taken mistakenly with
xml. |
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Mon Nov 17 16:36:18 2014, Mickey Chiu, Raspberry Pi drsosc does not exit properly
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When running drsosc on a raspberry pi, it seems the exit doesn't seem to work at all. This is true for the "exit" button on the window,
or the file menu exit, or the "x" on the window. I end up having to kill drsosc manually from the command line. This wouldn't be
such a bad thing except that it doesn't seem to store any settings when killed in this way. I'm wondering if anyone else sees the same thing, or |
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Tue Nov 25 14:06:34 2014, Stefan Ritt, Raspberry Pi drsosc does not exit properly
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Mickey Chiu wrote:
When running drsosc on a raspberry pi, it seems the exit doesn't seem to work at all. This is |
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Fri Jan 16 13:29:05 2015, Rainer Hentges, Mac OSX Yosemite 10.10
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Hello,
I can compile version 5.0.3 of DRS4sc on Mac OSX 10.0 without errors but when I want to execute the program I get the following error:
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Fri Jan 16 14:12:19 2015, Stefan Ritt, Mac OSX Yosemite 10.10
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> Hello,
>
> I can compile version 5.0.3 of DRS4sc on Mac OSX 10.0 without errors but when I want to execute the program I get the following error:
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Fri Feb 13 10:12:16 2015, Andrzej Grzeszczuk, drs4 and root
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Hello,
I compiled base file for drs system (DRS.cpp) to root framework (root.cern.ch) as dynamic library DRS.so. It can be used for building many
kind of applications under the root system. I applied it for older version of root 5.28 and for latest version 6.02 too. |
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Mon Mar 16 16:07:39 2015, Hermann-Josef Mathes, Running 2 instances of a DRS DAQ program
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Hi,
we want to run two instances of our little DRS DAQ program but obviously the first instance started always claims all DRS boards for itself and
the other one exits with an error. The 2 boards used in the example below have the serial number # 2413 and #2414 and are v5 boards. |
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Tue Mar 17 02:53:26 2015, Stefan Ritt, Running 2 instances of a DRS DAQ program
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I never had in mind running two systems in parallel, that's why the code claims all interfaces when started. You have to dig into the usb code which
is located in musbstd.c at function musb_open(). There you will find a line libusb_claim_interface() which requests exclusive access to the usb subsystem.
The code is there because I copied it from some standard example for the libusb library. You have to read the documentation for libusb (http://libusb.sourceforge.net/api-1.0/) and |
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Thu Mar 19 07:37:52 2015, Daniel Stricker-Shaver, Running 2 instances of a DRS DAQ program
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I don't know if it helps, but we measured the time resolution between two independendly running v3 boards using a single PC (latest software) in
Linux. (http://arxiv.org/abs/1405.4975)
You start the DRS DAQ program with only one USB board connected, first. Afterwards connect the second board and start another session. If you |
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Wed Oct 15 10:14:32 2014, Simon Weingarten, Clock settings in daisy chain DAQ
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Hi,
I'm currently working on a little DAQ system with four DRS evaluation boards. Do i need to apply any specific settings when using the clock in/out
connectors for synchronization? I do not see anything like that in the drs_exam_multi example. |
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Wed Oct 15 10:52:58 2014, Stefan Ritt, Clock settings in daisy chain DAQ
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Simon Weingarten wrote:
Hi, |
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Wed Oct 15 11:34:43 2014, Simon Weingarten, Clock settings in daisy chain DAQ
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Stefan Ritt wrote:
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Wed Oct 15 12:15:58 2014, Stefan Ritt, Clock settings in daisy chain DAQ 
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Here is the full version of the program with clock daisy-chaining. Before switching to the external clock, it checks if the clock really
is there (by reading an internal scaler), and only then enables it. Note that the code also works without clock daisy-chaining. But without clock daisy-chaining
your have some 400 ps time resolution between boards, and with clock daisy-chaining you get some 60 ps. |
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Fri Apr 17 10:07:38 2015, Simon Weingarten, Clock settings in daisy chain DAQ
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Hi Stefan,
do you know how these numbers (400ps and 60ps) scale with the sampling rate? The manual says they are for 5GS/s, do they change with slower sampling?
Thanks and best regards, |
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Mon Apr 20 13:08:24 2015, Stefan Ritt, Clock settings in daisy chain DAQ
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The resolution coming from the sampling rate goes into these numbers, but just marginally. At 5 GSPS, you get a few ps reolution, while at 1 GSPS, you
get like 15 ps. If you convolve 15 ps with 400 ps, you get 400.3 ps, which is not significantly worse than 400 ps.
Simon |
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Thu Apr 9 11:46:33 2015, Felix Bachmair, DRSBoard::SetTriggerSource
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Hi
I have a question about the function SetTriggerSource in the class DRSBoard (DRS.h/DRS.cpp)
In the implementation there is the following comment: |
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Tue Apr 21 12:01:45 2015, Stefan Ritt, DRSBoard::SetTriggerSource
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Your first assumption is correct, e.g.
source = 00000000'00000001 = 0x0001 ==> CH1
source = 00010001'00000000 = 0x1100 ==> CH1 and EXT |
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Sun Apr 5 22:16:48 2015, Julien Wulf, DRS4 Evaluation Board Baseline/Voltage Calibration
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Hi,
I`m trying to calibrate my DRS4 evoluation board to an input range of 0-1V but it doesn`t work.
1) First I tried to calibrate it with the drsosc (version 5.0.3) Software. The -0.5V - 0.5V calibration works, but during the 0 - 1V calibration |
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Tue Apr 21 12:52:18 2015, Stefan Ritt, DRS4 Evaluation Board Baseline/Voltage Calibration
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1) I tried to cablirate a V5 board with drsosc 5.0.3 and it just worked fine for me. No idea what went wrong in your case.
2) The "found 4096 stuck pixels on this board" can be safely ignored. It comes from the fact that the standard evaluation board has
four cannels unconnected (the DRS4 chip has 8 channels, four are connected to in the evaluation board and four are unconnected). So the software sees |
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Tue Apr 21 13:03:38 2015, Daniel Stricker-Shaver, DRS4 Evaluation Board Baseline/Voltage Calibration
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I also use Ubuntu 14.04 LTS and for my V3 borad I have to use drsosc 4.x or ealier to perform the calibration.
Stefan
Ritt wrote:
1) I tried to cablirate a V5 board with drsosc 5.0.3 and it just worked |
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Tue Apr 21 13:06:39 2015, Stefan Ritt, DRS4 Evaluation Board Baseline/Voltage Calibration
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Sure, for a V3 board you need a pre-V5 software, but I assumed Julien had a V5 board.
Daniel
Stricker-Shaver wrote:
I also use Ubuntu 14.04 LTS and for my V3 borad I have to |
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Wed May 13 01:07:36 2015, Cosmin Deaconu, DRS4 Evaluation Board + Powered USB Hub
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I am trying to use 4 evaluation boards with a powered USB hub (since eventually, I will have to do this on a laptop). It seems like destroying
the DRS object is insufficent to properly close the boards when on the hub (i.e. I get usb read errors next time I run my program). When all the boards
are plugged into the computer, all is fine. This is on Linux using libusb1. My guess is something about resetting the port doesn't work properly |
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Wed May 13 00:52:51 2015, Cosmin Deaconu, Getting Trigger Source
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I'd like to be able to know which channel (0,1,2,3 or external) was responsible for the trigger. DRSBoard::GetTriggerSource() seems to always
return 1. Is there a way to get this information? Using the DRS4 evaluation board and software version 5.0.3.
Thanks, |
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Wed May 13 08:19:53 2015, Stefan Ritt, Getting Trigger Source
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DRSBoard::GetTriggerSource() simply returns what has been enabled via DRSBoard::SetTriggerSource(). The actual source which causes the trigger is not
stored in the hardware of the board, because I can be reconstructed easily from the waveforms. So just look which of the channels is above your trigger
threshold. If none of the channels has a waveform obove the threshold, then the trigger must have been come from the external trigger. |
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Wed May 13 09:31:18 2015, Chenfei Yang, transparent-mode voltage
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Hello Mr. Stefan Ritt
For DRS4 differential inputs ranges form 500mV to 1100mV, with ROFS set to 1.55V, O_OFS set to 1.3V, the outputs of DRS4 is shown in the
attachment. |
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Wed May 13 09:45:51 2015, Stefan Ritt, transparent-mode voltage
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The ROFS signal has no effect in the transparent mode, so you have to adjust O_OFS between sampling and transparent mode accordingly. Either use a DAC
or two voltages with an analog switch.
Chenfei |
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Wed May 13 09:55:09 2015, Chenfei Yang, transparent-mode voltage
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Here's the problem. My external ADC has 2Vpp differtial input voltage range. And the common-mode voltage of the inputs need to be 1.3V. I cannot
make both the transparent-output and the readout-output meet the ADC input requirement.
Stefan |
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Wed May 13 10:16:40 2015, Stefan Ritt, transparent-mode voltage
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I see your point. Actually I will soon have the same issue since we design right now a board with an AD9637 using the transparent mode. Which one are
you using? The common mode range given in the datasheet is limited to guarantee optimal performance. But some ADCs allow a slightly bigger common mode
range with reduced performance, but which might still be ok for some application. A "real" solution would be to put switchable level shifters |
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Wed May 13 10:27:43 2015, Chenfei Yang, transparent-mode voltage
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I'm using an AD9252, 0.9V common mode voltage is suggested and I already use 8 un-switchable level shifters. Just as you said, this common mode range
is recommended for optimum performance and the device can function over a wider range with reasonable performance. So I think I could
adjust O_OFS to a minor level during transparent output. |
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Wed May 13 12:34:49 2015, Stefan Ritt, transparent-mode voltage
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There might be a solution. How do you bias th input of the DRS4 chip? If you use a scheme as described in elog:84,
you can bias DRS_IN+ and DRS_IN- as desired. Take for example a board input range of 0-1V. For a 0V input, you bias DRS_IN+ and DRS_IN- both
with 0.9V. A 1V input signal then puts DRS_IN+ to 1.4V and DRS_IN-to 0.4 V. In the transparent mode, DRS_OUT+ = DRS_IN+ and DRS_OUT- = O-OFS |
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Wed May 13 12:52:22 2015, Chenfei Yang, transparent-mode voltage
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Yes. I use exactly the same scheme as you mentioned. I'll try your solution.
Stefan
Ritt wrote:
There might be a solution. How do you bias th input |
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Wed May 13 16:13:07 2015, Chenfei Yang, transparent-mode voltage
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If using a ROFS of 0.9V, the input would not between 1.05V~2.05V better non-linearity area. Is that appropriate?
Stefan
Ritt wrote:
There might be a solution. How do you bias th input |
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Wed May 13 16:25:24 2015, Stefan Ritt, transparent-mode voltage
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To get the good linearity, you need indeed ROFS = 1.05V. With a O-OFS of 0.9V, a zero input signal would give you DRS_OUT+=1.05V and DRS_OUT-=0.75V.
I think this is till in the range of your ADC, right? So it's a tradeoff between linearity and available range. I do not know how nonlinear the DRS4
will be for ROFS < 1.05V, you have to try. If it's getting too bad, you still can correct for this off-line. |
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Sun May 24 09:34:27 2015, Peter Steinberg, Peculiar behavior of time values for Rev5 DRS4 EB
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Hi -
I am setting up a new DRS4 rev5 but using drivers and software we were recently using with a Rev4 (with a recent release of the drs4 code, from
mid-2014). |
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Wed Jun 3 09:07:38 2015, Stefan Ritt, Peculiar behavior of time values for Rev5 DRS4 EB
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First of all, you should not use new boards with old software. I try to keep the current software compatible with old boards, but not vice versa. Please
use the DRS.cpp library from the current V5 software, otherwise your time calibration will not work.
If you then do the calibration with the V5 software and the V5 board, you will see that the bin widhts of the DRS chips are not the same. Actually |
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Tue May 19 14:14:45 2015, Ilja Bekman, DRS4 firmware UCF constraints
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Hello, I'm using two DRS4 rev.5 boards for 8ch readout and triggering.
I needed to modify the trigger logic and implement some tweaks in the firmware, and noticed that
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Fri May 22 14:25:45 2015, Stefan Ritt, DRS4 firmware UCF constraints
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> Hello, I'm using two DRS4 rev.5 boards for 8ch readout and triggering.
>
> I needed to modify the trigger logic and implement some tweaks in the firmware, and noticed that
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Tue May 26 11:27:27 2015, Felix Bachmair, DRS4 firmware UCF constraints
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> > Hello, I'm using two DRS4 rev.5 boards for 8ch readout and triggering.
> >
> > I needed to modify the trigger logic and implement some tweaks in the firmware, and noticed that
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Fri Jun 5 12:07:38 2015, Stefan Ritt, DRS4 firmware UCF constraints
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I presume you have several evaluation boards and want to run them in sync, right?
This can be either made in daisy-chain mode (see manual page 25). In this case only the master board can trigger the slave boards. If you need to trigger |
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Fri Jun 5 13:15:35 2015, Felix Bachmair, DRS4 firmware UCF constraints
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Hi Stefan,
No we only use one evaluation board. We use the evaluation board as a part of our beam test setup. It includes a telescope based on the current PSI46V2.1
CMS Pixel chip and a trigger logic board for triggering the telescope and the evaluation board. This includes a
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Fri Jun 5 13:29:55 2015, Stefan Ritt, DRS4 firmware UCF constraints
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Do the following:
Use the TRG OUT of the evaluation board as a "busy". Only if this signal goes low (meaning that the readout of the board is complete and the board has |
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Fri Jun 5 13:32:03 2015, Stefan Ritt, DRS4 firmware UCF constraints
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Actually we should take this offline not to pester other DRS users which are not interested in this topic. Please call me directly (3728) at PSI.
/Stefan |
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Tue Jun 16 20:45:54 2015, Michael Buadelk, DRS4 Evaluation Board Osc Application
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Hi, I have a DRS4 v5 evaluation board and I have a novice question about the oscilliscop application. When I connect it to a photo-detector (silicon
photo-multiplier to be exact), the signal appears only on one half of the screen, and I cannot change it to be full screen, and pulse to be centered. I
tried changing delay time and played around with the settings of the applicaton but no success. I'd apprecite if someone help me on this, probably |
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Tue Jun 16 22:26:41 2015, Stefan Ritt, DRS4 Evaluation Board Osc Application
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There is a horizontal position slider in the "Horizontal" box on the right side below the trigger delay. Use it.
Michael
Buadelk wrote:
Hi, I have a DRS4 v5 evaluation board and I have a novice question |
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Thu Jun 18 17:33:05 2015, Gregor Kramberger, drs 5.03 and windows 8.1
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I have problems with driver installation on windows 8.1 (software version 5.03). I have sen that that has been an issue before (driver signing)
and I would like to know if this has been solved. We run several DRS4 evaluation boards on different PCs all running Win7 without any problems.
Therefore we are almost confident that it is related to Win 8.1. Thanks. |
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Fri Jun 19 12:32:10 2015, Gregor Kramberger, drs 5.03 and windows 8.1
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Gregor Kramberger wrote:
I have problems with driver |
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Sat May 23 11:03:20 2015, Felix Bachmair, Issue with Trigger rates below ~100Hz
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Hi
We are working with the DRS 4 V5 version and we investigated an issue with the trigger at rates below ~120 Hz.
As long as we have a trigger rate of more than 125 Hz. everything seems to work fine and we are recording more or less all events. |
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Thu Jul 2 08:53:17 2015, Felix Bachmair, Issue with Trigger rates below ~100Hz
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Hi,
We did a further investigation of this problem:
We figured out that this issue seems to be related to the kernel. |
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Thu Jul 2 13:20:51 2015, Felix Bachmair, Creation of Object files
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HI,
We are using the DRS4 Board in the EUDAQ framework [1]. We wrote a a Producer based on the software of the evaluation board, which is using the
DRS class/header/src files. |
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Fri Jul 3 17:13:27 2015, Stefan Ritt, Creation of Object files
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Hi Felix,
the distribution does not contain any binaries, since there are too many Linux distributions around, so everybody compiles from the sources under
Linux. Do you want me to just add libDRS.so to the official Makefile? Actually you are the first one asking for this. Would it be beneficial to have this |
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Mon Jul 6 11:30:56 2015, Felix Bachmair, Creation of Object files
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Hi Stefan,
That's fine for me. I thought it might be interesting for others as well..
Cheers |
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Mon Jul 6 19:25:27 2015, Stefan Ritt, Creation of Object files
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Anyhow it would be nice if you just post your Makefile here, which runs with the standard distribution, so people can use it if needed.
Stefan
Felix |
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Tue Jul 7 09:29:21 2015, Felix Bachmair, Creation of Object files
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Yes of course no problem.
You can download via github https://github.com/veloxid/DRS4-v5-shared and I
also put it in the attachment. |
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Mon Jul 20 09:25:38 2015, Chenfei Yang, Measure the time between different samples
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Hi,
I have a question using a data acquisition card base on DRS4 chip. How can I measure the time between several samples of one channel，with the
accuracy of like nanoseconds , for I am using the internal trigger. Is there any complete work about this problem？
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Thu Jul 23 13:46:12 2015, Stefan Ritt, Measure the time between different samples
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> Hi,
> I have a question using a data acquisition card base on DRS4 chip. How can I measure the time between several samples of one channel，with the
accuracy of like nanoseconds , for I am using the internal trigger. Is there any complete work about this problem？
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