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New entries since:Thu Jan 1 01:00:00 1970
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Entry  Wed Aug 7 15:05:59 2013, Hermann-Josef Mathes, Repeated time calibration 
    Reply  Wed Aug 7 15:10:57 2013, Stefan Ritt, Repeated time calibration 
       Reply  Wed Aug 7 15:20:33 2013, Hermann-Josef Mathes, Repeated time calibration 
          Reply  Wed Feb 5 13:41:42 2014, Stefan Ritt, Repeated time calibration 
Entry  Wed Mar 5 21:54:13 2014, Hermann-Josef Mathes, Software drs-5.0.0 fails to compile (drsosc) drs-5.patch
    Reply  Thu Mar 6 11:12:44 2014, Stefan Ritt, Software drs-5.0.0 fails to compile (drsosc) 
Entry  Wed Apr 16 03:22:43 2014, Wang , why is the first channel output error?  QQ??20140416090124.jpg
    Reply  Wed Apr 16 08:30:32 2014, Stefan Ritt, why is the first channel output error?  
Entry  Thu Apr 10 14:45:12 2014, Roman Gredig, DRS4 Evalboard V5 with Windows7Pro64bit 
    Reply  Wed Apr 16 10:24:55 2014, Stefan Ritt, DRS4 Evalboard V5 with Windows7Pro64bit 
Entry  Thu Apr 17 12:02:28 2014, Wang , The first channel is wrong. QQ??20140417174309.jpg
Entry  Tue Apr 15 18:35:41 2014, Carlo Stella, drs_exam project fail to compile 
    Reply  Wed Apr 16 08:20:36 2014, Stefan Ritt, drs_exam project fail to compile 
       Reply  Thu Apr 24 23:03:25 2014, Carlo Stella, drs_exam project fail to compile 
Entry  Fri May 16 14:04:47 2014, Benjamin LeGeyt, simultaneous writing and reading with region of interest mode? 
    Reply  Mon May 19 08:04:57 2014, Stefan Ritt, simultaneous writing and reading with region of interest mode? 
Entry  Tue May 27 13:46:18 2014, Dominik Neise, Spikes in DRS4 data on custom baord. 
    Reply  Tue May 27 16:07:17 2014, Stefan Ritt, Spikes in DRS4 data on custom baord. 
Entry  Thu Jun 12 12:40:03 2014, Roman Gredig, DRS eval bord v5 Timing eqn1.png
    Reply  Thu Jun 12 12:46:00 2014, Stefan Ritt, DRS eval bord v5 Timing 
Entry  Thu May 29 04:22:43 2014, Toshihiro Nonaka, CalibrationWaveform offset.png
    Reply  Thu Jun 12 17:16:13 2014, Stefan Ritt, CalibrationWaveform 
Entry  Wed Jan 15 14:20:51 2014, Stefan Ritt, Announcement of new Evaluation Board V5 drsosc.png
    Reply  Tue Feb 18 14:12:37 2014, Stefan Ritt, Announcement of new Evaluation Board V5 scope.png
       Reply  Mon Jun 9 12:03:26 2014, Osip Lishilin, Announcement of new Evaluation Board V5 
          Reply  Wed Jun 11 11:13:50 2014, Stefan Ritt, Announcement of new Evaluation Board V5 
             Reply  Mon Jun 16 15:35:59 2014, Osip Lishilin, Announcement of new Evaluation Board V5 
Entry  Mon Jul 14 19:03:05 2014, Yves Bianga, change cascading from 1024 to 2048 bins for each input channel 
    Reply  Wed Jul 16 12:10:19 2014, Stefan Ritt, change cascading from 1024 to 2048 bins for each input channel 
Entry  Wed Jul 30 11:38:58 2014, Tsutomu Nagayoshi, Sampling speed of DRS4 Board ver4 
Entry  Tue Jun 18 14:19:39 2013, Stefan Ritt, ROOT program to decode binary data from DRSOsc decode.Cc1.gif
    Reply  Wed Jul 30 17:05:06 2014, Stefan Ritt, ROOT program to decode binary data from DRSOsc read_binary.Cread_binary.cpp
Entry  Tue May 13 19:34:58 2014, Luka Pavelic, drsosc binary to cern ROOT file conversion 
    Reply  Tue May 13 19:39:36 2014, Stefan Ritt, drsosc binary to cern ROOT file conversion 
       Reply  Tue May 13 22:03:47 2014, Luka Pavelic, drsosc binary to cern ROOT file conversion 
          Reply  Tue May 13 23:08:50 2014, Stefan Ritt, drsosc binary to cern ROOT file conversion 
             Reply  Fri Jun 27 11:23:19 2014, ChengMing Du, drsosc binary to cern ROOT file conversion 
                Reply  Wed Jul 30 17:05:38 2014, Stefan Ritt, drsosc binary to cern ROOT file conversion 
Entry  Thu Aug 21 11:03:36 2014, Martin Petriska, 10GSps on DRS4 Evm with delay cables 
    Reply  Tue Aug 26 12:32:21 2014, Stefan Ritt, 10GSps on DRS4 Evm with delay cables 
Entry  Fri Sep 12 11:52:21 2014, Dmitry Hits, synchronizing two DRS4 evaluation boards readout with one computer 
    Reply  Fri Sep 12 13:00:04 2014, Stefan Ritt, synchronizing two DRS4 evaluation boards readout with one computer 
       Reply  Fri Sep 12 13:37:42 2014, Dmitry Hits, synchronizing two DRS4 evaluation boards readout with one computer 
          Reply  Fri Sep 12 13:41:43 2014, Stefan Ritt, synchronizing two DRS4 evaluation boards readout with one computer 
Entry  Fri Sep 12 14:57:22 2014, Dmitry Hits, compilation error for v5.0.2 
    Reply  Fri Sep 12 16:08:49 2014, Stefan Ritt, compilation error for v5.0.2 
       Reply  Fri Sep 12 16:38:24 2014, Dmitry Hits, compilation error for v5.0.2 
          Reply  Mon Sep 22 14:52:21 2014, Stefan Ritt, compilation error for v5.0.2 
Entry  Mon Sep 15 16:24:41 2014, Hannes Wachter, Timing Calibration Fail 
    Reply  Mon Sep 22 15:04:37 2014, Stefan Ritt, Timing Calibration Fail 
Entry  Tue Oct 7 14:09:02 2014, Stephane Debieux, USB Microcontroller firmware 
    Reply  Mon Oct 13 16:46:56 2014, Stefan Ritt, USB Microcontroller firmware 
       Reply  Mon Oct 13 17:08:40 2014, Stephane Debieux, USB Microcontroller firmware 
          Reply  Mon Oct 13 17:14:58 2014, Stefan Ritt, USB Microcontroller firmware 
             Reply  Tue Oct 14 16:21:07 2014, Stephane Debieux, USB Microcontroller firmware 
                Reply  Tue Oct 14 16:29:12 2014, Stefan Ritt, USB Microcontroller firmware 
                   Reply  Tue Oct 14 16:34:45 2014, Stephane Debieux, USB Microcontroller firmware 
                      Reply  Tue Oct 14 16:38:14 2014, Stefan Ritt, USB Microcontroller firmware 
                         Reply  Tue Oct 14 16:51:37 2014, Stephane Debieux, USB Microcontroller firmware 
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