Dear Stefan Ritt,

I am using a DRS4 v5 to do timing measurements of Positron lifetime. I use the DRS Oscilloscope with triggering on 2 channels when I have a coincidence. Attached is a picture with all the setting that I use. When I use the DRS4 for a long measurements of 5 million events for a couple of hours, the DRS Oscilloscope stops showing any signal .After the first restart of the program I get a strange signal which is at the bottom of the scope range of voltage picture below(in the picture I changed the vertical positions of the channels for better viewing). Only after a couple of DRS Oscilloscope restarts and USB reconnections do I get the results again.

I currently am using another DRS4 v5 and the same situation occurs again although with lower frequency.

What can I do to solve this problem?

thank you very much,

Daniel

Dear Daniel,

sorry my late reply, I'm pretty busy these days. The behavior you report has not been seen before, but I guess no one tried to take such long runs of data yet. Can you confirm that the problem also occurs without writing data to disk, or is it disk-related? I guess you use it under Windows 7, right?

Stefan

Dear Stefan Ritt,

Yes I use Windows 7, If the DRS Oscilloscope program stays on for a couple of hours without saving the data, the problem will occur. It seems it happens more often when there is data writing and when the rate of events is slow, about 100 events per second, at high rates it almost doesn't happen. Can it be temperature related?

Daniel

Then it seems that there is some USB communication problem. I heard this also from other people, that the USB data transfer under Windows has sometimes problems. I develop and run the board under Mac OSX, and there the same software runs for days without problem. So I guess it's related to the underlying libusb lib which is used by the DRS oscilloscope, on which I have no influence. So the only advice I can give is to take shorter series of data. Anyhow the board is not considered a full DAQ system, just an "evaluation board" which means one can try the DRS4 chip and play with it. For serious business one should build own electronics with the chip. Anyhow we are currently developping an Ethernet board which allows much faster acquisition rates, so USB will be obsolete some day. Nevertheless I will try to reproduce your problem and see if I can do anything. At what trigger rate does it show up most prominently?

Stefan

I tried this night to run the board at a 10 Hz rate with an external pulser, without writing, and it did not freeze after ~14 hours of running on Mac OSX. This night I will try again with writing.

Stefan

Even with writing for one night no problem (see below). Have you checked how big your data file is? I guess there is a limit under Windows of 2 GB. If that's the case, you have to write shorter files.

At hight rates I worked with files of up to 20 GB so I don't think this is the problem.

I will try to run it under Ubuntu and see if i can recreate the problem.

Thank you very much for the quick responses and help.

Hi I have also positron annihilation system based on DRS4v4 cards. Its running several weeks, sometimes months, without freezing in windows7 64bit system (Pentium Core Quad 2Ghz, 4GRam).  Problem was when widows was trying to install updates and restarted PC. In beginning I had some problem with memory leak in my application, but it was simple seen in task manager that application memory was rising and was need to find memory leak in application code. Now I remember card was sometimes freezing when room air conditioning with 2kW was starting and high electricity pulses were reason of USB problems, it helped to put air conditioner and PC in different power line input. Hope it help to solve zour problems.

Martin

I too have air conditioning in the room, not sure to which power line it is connected, but I'll try to check this aswell.

Thank you very much.

I would like to be able to trigger in this fashon:  channel 0 > 0.1 and. channel 1< -0.1,  because I have a positive and a negative signal.  Can DRS4 (5) Eval board do this kind of trigger?

Thanks!

Abaz

No. You have to use an inverter for one of your signals.

Stefan

Ok, thanks!  do you know an easy in-line inverter like mini-circuit or digikey?    Can also redesign the detector I gues to produce positive signals, just it might be easier if there was a simple inverter if you are aware of? thanks Abaz

Here is one (SI 100): https://www.picoquant.com/products/category/accessories/adapters-splitters-cables-various-accessories-for-photon-counting-setups

Thanks, that looks just fine.

I needed a fast pulse inverter in order to feed signals from the recent SensL SiPMs into a conventional CFD which only accepted negative signals. I got a very small ferite torridal transformer from Coilcraft and wired up to invert signals then inserted into in 50 ohm coax cable and it works fine. These things cost only a few cents each!

Hi Chris,

 I am looking at Sensl SiPMs as well,  can you send the part number from Coilcraft?

Thanks!

Abaz

The coilcraft part number is: JA4220-ALB. Iordered two of them and they were sent as free samples. You might want to buy some slightly bigger ones. I found them so small it was very hard to solder the coax cable to the connectors. Since I got them, I managed to damage one as they are quite fragile! In the confirmation email I got there was some contact info which may be useful for you: "For help, contact Victoria Berner at 847-516-5551  vberner@coilcraft.com "  BTW every time I use this forum I'm told that my password is not valid. Each time I reset it according to the "Lost pasword preceedure. Then I can log on again. Its quite annoying.

Thanks again,   this is very useful,  just another question did you put any other passive elements in the circuit for inverting the signal or just simply swaped the transformer connections? 

No there are no other components. I put a photo of the inverter with its cables SMA and one end, BNC at the other. You can see it is very small. I glued the inverter to a piece of thin plywood, and fixed the cables to it before attempting to solder them to the pads on the ferite bead support

Thanks, great!

Hi,

I am trying to understand some details about the timing calibration.

We wrote our own code but we more or less use the ideas of the Oscilloscope class.

In the binary file writing of in the function Osci.cpp::SaveWaveforms() (line 924ff)

the following code is executed:

if (m_waveDepth == 2048) {
    t = (tcal[j]+tcal[j+1])/2;
    j++;
} else
    t = tcal[j];

I do not understand the averaging of the to adjacent calibration constants. Could you explain this? Do one have two measurements?

Cheers

Felix

The evaluation board normally has 1024 bins per channel. We offer an option with 2048 bins using channel cascading, to capture longer waveform windows. The binary data format is however defined as having 1024 bins. Therefore, for the 2048 bin boards, the software averages over two adjacent cells and saves effectively 1024 bins. The noise of each bin improves this way by sqrt(2). The time however is not very well defined, since you average the voltage of two bins. Therefore, I simple also average over the time of the two bins. Maybe this is not the best way, so feel free to change this.

Stefan

Hello Stefan,

I just stumbled again over a phrase in the DRS4 datasheet I never really understood, but didn't find the time to ask.

On page 8 it says: "An internal circuit ensures that the write signal is always 16 cells wide."

So when I look at a single channel, do I understand correctly, that at any given time during sampling, always 16 cells are open, i.e. 16 cells are connected to the analog inputs? So when the domino frequency is e.g. 5GHz then each cell sees the analog input not for 200ps but for 3.2ns correct?

Yes this is correct. But it is a sample-and-hold circuit. So the sampling cell follows the input for 3.2 ns, then samples and holds the current value at the end of the period.

Hello! My name is Dmitry. I am from SiPM Lab is NRNU MEPhI (Russia, Moscow). We bought DRS4 evaluation board V5 with firmware 21305. We use 5.0.4 build 21911 2015-11-23 software version (and before that we used 5.0.3 build 21508, 2014-10-15) with Windows 7 32bit.

We observe some strange behaviour. When we save waveforms (in xml or binary data) we see that some of them have the baseline shifted of about -5 mV.

The first picture (pic1) is 1000 waveforms which were glued in one. It is clearly see that baseline quite often has the shift.

The same effect can be seen without saving (writting): rarely when we use normal or auto trigger mode (pic3), and always in single trigger mode (pic2).

The images are attached.

Do you have any idea how it can be fixed?

Thanks, Dmitry.

The baseline shift comes from some instable power supply inside the evaluation board which cannot be controlled to the mV level. In a real measurement, you usually get an additional baseline shift due to some environmental electromagnetic interferences, such as a 50 Hz signal. People fix this shifting baseline by always aquiring a small portion (10-20 samples) of the baseline before any signal from a particle detector. The signal is then corrected event-by-event by subtracting the baseline from each waveform. By doing that, you fix not only the 50 Hz noise, but also the shifting baseline you mention.

Stefan

I would really love to be able to save histogram data, though I have not been able to do this. I could take a screenshot and extract the data from an image, but would prefer to avoid this if there is a simpler way... possibly I have overlooked something obvious? Thanks very much for any advice or tips.

There is no histogram save functoinality in ther DRSOscilloscope program - on purpose. The board and the software are meant to evaluate the board, not to replace a full DAQ system. If we want to save histograms, you maybe also want to set the range, make cuts, do fits etc. So it would take lots of resources to add all that. Therefore we recommend to use the stand-alone C program drs_exam.cpp to read the board, the you can either do whatever you want in the C program, including saving of histograms. Alternatively, you can use ROOT to analyze binary stored DRS data and do whatever histogram manipulation you want there.

Stefan

You can use qtpals, there is posibility to save histograms (energy, time diference), only set trigger on channel which you use. https://sourceforge.net/projects/qtpals/files/?source=navbar

I am attempting to use the DRS4 to measure the timing resolution of a pair of SensL silicon photomultipliers (SiPM). In order to do this I need to trigger the DRS4 only when there is a coincidence between the two input signals, and hopefully make histograms of the relative detection times of each detector.

There are two completely separate issues. (1) I think this may just be a labelling error. In the first image (OR_mode_selected) one can clearly see two pulses which are very similar. In this mode, both signals are present, and are always present. I think this should be the "AND", not "OR" of the two signals. Contrast this with the second image where I have selected "AND_mode". Clearly only one signal is present, and either signal trigges an event, so this should be "OR", not "AND"

The second issue is, for me, much more serious. I want to sample the leading edge of this event in order to determine its "time". The little "T" at the top of each image is, I believe the "trigger point" in the first two images. However, this is well after the part of the signal I am interested in. The first two images were at 2 GigaSamples/sec. The third is at 5 GigaSamples/sec. Clearly the event I am interested in processing is over by then. At the lower sampling rate, I can see well before the "T", but at the higher one I can only see after the "T". I had built an external "coincidence circuit" and the "external trigger mode" hoping to to circumvent this issue by using very long cables to delay the signals inut to the DRS4, But even then I have not been successful in getting the to work.

I am using version 5.0.3 on a PC as the version released after that did not work.

I hope some can help!

Chris Thompson

Hi Chris,

if you ever used an oscilloscope, you might be familar with the button controlling the riger in respect to "risign edge" vs. "falling edge". I copied the same for the DRS software. So just click on that button:

and you will get what you want. Also the AND/OR gets reversed this way. If you select rising edge (default), the AND will be made if both signals are ABOVE the threshold, that's why it does not work for you. If you select falling edge, the AND will be made if both signals are BELOW the threshold. For negative pulses you need falling edge.

Stefan

Hi

the drs4 start to generate Dtap signal after reset and standard configuration.

while in reset Denable and  Dwrite are low

after reset we put Denable in high

the Dtap starts to toggle, and the plllck stabilizes on about 1V.  

After 40Msec the Dtap stops to toggle and the plllck go to 2.5V

Why do the Domino stop working?

Thanks, Mony

No idea what you do wrong. I need to see oscilloscope traces for all your inputs and voltages. What is your REFCLK input?

my refclk is 1.25Mhz

what are the inputs and voltage you need to see?

Avdd and Dvdd are 2.5v

Denable is "1" Dwrite "0"

currently i am doing an external reset cycle, after that i am doing the configuration cycle.

should i relay on the internal reset?

the Dtap is toggling for 33.8msec and then just stops.

Thanks, Mony 

I want to see the trace on the scope for the DTAP, the REFCLK, the DENABLE and the DWRITE.

Probably (but it's just a guess), you have a problem with the soldering of the DRS chip, maybe to the PLL loop filter. Or you chose the wrong capacitor/resistor combination for the loop filter. There are ~10 other groupsl who did the same and it works for all of them, so there must be a problem on your side.

Stefan

Hi

We have some measures to show (attached)

1. Dtap and Denable
2. Dtap+Denable in zoom
3. Dtap + Refck+
4. Dtap + Dspeed

From the screen shots it can be seen that refck+ is not synchronized with Dtap (PLL not working correctly)

And Dspeed is going done to zero after some time.

In our system Dspeed is shorted to pllout.

So it looks like pllout do not pump the RC filter capacitors.

We tested various value of R and C's.

Also we checked that pllout is sorted to Dspeed.

Thanks, mony

Thanks for posting the plots. It really looks like the PLL is not working. I see two possible reasons: 1) The PLLEN bit in the configuration register is not set and 2) The REFCLK signal does not reach the chip. We had cases whrere people had a hard time to solder the DRS4 correctly due to the small pins. So if the REFCLK+ and REFCLK- signals have a poor connection, then the PLL of course won't work. Putting some more tin at the pins manually usually helps. Or remove the chip completely and try with another chip. In theory there is the possibility that the internal bond wire of the REFCLK signal has a bad connection, but we tested all chips we send out so we should have seen that. But trying with another chip cannot hurt in general. Next month I'm coming to the Weizman Institute for the ISOTDAQ shool. If you want we can meet there if you don't mind the 120 km drive from Haifa.

Stefan

Hi Stefan

Thanks for your input.

We are in the process of assemble another PCB board.

so soon we can compere between two boards.

As for the PLLEN bit, we set it.

We checked several times the soldering of the DRS4 using a microscope.

Everything looks ok.

In what method do you recommend to solder the DRS4?

Thanks for the invitation to meet.

120Km is not so far J

mony

Hi

We have resolve the problem, the Dtap is now working correctly.

There were two problems:

1. After configuration we put the all address bits to one (standby mode)

We are now setting the address bits to all zero. Failure

to do so result in Dtap  stop toggling after several hundred milliseconds.

1. The DMODE bit in contradiction to the data sheet should be set to 0

And not to 1.

Is this a known bug in the chip?

Only bay setting DMODE to zero we got the Dtap to work correctly.

The PLL locks after 1 milisec.

If we set it to one we get Dtap that stop toggling after several hundred milliseconds.

We have test it on two boards, they both worked in the same.

Never did we get a One shot  Dtap.

Did you published a errata page to the drs4?

Thanks, Mony

While I can understand 1., I'm puzzeled by 2.

If you put the chip in standby mode, the internal current sources are switched off, which of course make the domino wave non-functional. This is clearly stated in the data sheet.

Concerning the DMODE bit, we operate all (!) our chips with DMODE=1. Actually this is the default value. After a reset, all register bits are "1", which enables the PLL and causes DTAP to oscillate. If DMODE=1, the DTAP signal should toggle only once (!) since the domino loop is not closed. So the scope traces you showed previously are consistent with the standby mode, but not possible with ANY setting of DMODE.

Stefan

surrey i forgot to update..

after carefully examining our VHDL we found out that there are brief times that we put A0-A3 in 1111

after making shore that a0-a3 never get 1111 value thae drs4 woks as expected.

The dtap toggols ok.

We can sample and read all the data channels.

So, putting A0-A3 value of 1111 even for very short period  " confuse " the DRS and then it start to behave in a strange manner.

mony

Thanks for the update, I will add a note into the data sheet.

I am trying to compile drs-exam, but am getting an error message I do not understand:

1>musbstd.obj : error LNK2019: unresolved external symbol _usb_open referenced in function _musb_open
1>musbstd.obj : error LNK2019: unresolved external symbol _usb_close referenced in function _musb_close
1>musbstd.obj : error LNK2019: unresolved external symbol _usb_get_descriptor referenced in function _musb_get_device
1>musbstd.obj : error LNK2019: unresolved external symbol _usb_bulk_write referenced in function _musb_write
1>musbstd.obj : error LNK2019: unresolved external symbol _usb_bulk_read referenced in function _musb_read
1>musbstd.obj : error LNK2019: unresolved external symbol _usb_set_configuration referenced in function _musb_open
1>musbstd.obj : error LNK2019: unresolved external symbol _usb_claim_interface referenced in function _musb_open
1>musbstd.obj : error LNK2019: unresolved external symbol _usb_release_interface referenced in function _musb_close
1>musbstd.obj : error LNK2019: unresolved external symbol _usb_set_altinterface referenced in function _musb_set_altinterface
1>musbstd.obj : error LNK2019: unresolved external symbol _usb_reset referenced in function _musb_reset
1>musbstd.obj : error LNK2019: unresolved external symbol _usb_init referenced in function _musb_open
1>musbstd.obj : error LNK2019: unresolved external symbol _usb_set_debug referenced in function _musb_open
1>musbstd.obj : error LNK2019: unresolved external symbol _usb_find_busses referenced in function _musb_open
1>musbstd.obj : error LNK2019: unresolved external symbol _usb_find_devices referenced in function _musb_open
1>musbstd.obj : error LNK2019: unresolved external symbol _usb_get_busses referenced in function _musb_open

I have tried redownloading a different version of libusb-1.0, but the problem was not solved.  What might I be doing wrong?

I guess you are compiling under MS Windows ??? You probably don't link correctly to the USB lib. Try to compile the examples coming with libusb-1.0 to make you everything is right there.

Hello Stefan,

Here in Rockford, TN we just got a new DRS4 evaluation board (Serail # 2612, Board Type 9, Firmware 21305) which is labeled as combined 2048.

It looks like the drs_exam.cpp only works with 1024 samples per channel. We'd like to be able to get 2048 samples from each of the four channels but I am uncertain what code modifications are necessary support this.

Could you offer a suggestion? I've searched the forum for cascade and read several threads but they are pretty old. One even says it isn't supported in the evaluation board, but I think that is no longer the case.

Thanks for your help,

Larry Byars

An update. I have been successful in making modifications to drs_exam.cpp so that I can get 2048 samples per channel.. The main changes were to the size of the time_array and wave_array and adding a call to Set ChannelConfig(0,8,4). It was also necessary to change the parameters to GetWave so that the Trigger Cell and WSR values were passed to get the channel combinations correct (2048 channel.ppt).

I've moved on to try to increase the speed of acquisition (I get only about 500 events/sec) and trying to understand the corrections.Working through the source code slowly...

Regards,

Larry Byars

Hi Larry,

sorry my late reply, swamped with work here. You were right in the modifictions you did, congrats. The speed limitation of 500 events come from USB2, which simply is not fast enough. The 500 Hz are mentioned on the evaluation board web site, so you should have seen that before ordering. Some people build their own hardware around the chip, in which case they get higher rates. The "hard" limit is the DRS4 readout speed, which is 30ns per sample. So if you have 8 ADCs in parallel, and you only need 100 samples of your waveform, the readout time is 3 us, in which case you could go up to a few 10 kHz without much of a dead time.

Cheers,
Stefan

I am new to this forum. I have ordered a DRS4 evaluation board for doing experiments with very fast PET detectors. It has not arrived yet. The version of the manual I downloaded today shows software  installation instructions for Windows 7 and earlier versions. I intend to use it on a 64bit PC running Windows 8.1. Will the Windows 7 driver work, or is there an updated version for Windows 8 or 10?

Have a look here elog:434

I tried this suggestion of changing the startup settings to ingore driver license signing (as suggested in the post # 434), but when I tried to install the software I got a error message which I captured from the screen and I have attached. Perhaps I have the wrong version, or, as suggested, the file I downloaded from your site is incomplete?

I tried restarting Windows 10 in a way the allowed me to use "advanced startup options" Option 7 suggested it was to restart without mandatory driver signing. However, the error persists. Has anyone tested this latest version 5.0.4 on Windows 10? My hardware arrived today, and I am anxious to test it.!!!!

On a hunch, I tried downloading V 5.0.3 instead. This works, and I now have the oscilloscope mode displaying signals! (just to make sure, I re-tire version 5.0.4 and still get the same error. So, in summary V 5.0.3 seems to install successfully and work with Windows 10, but the newer V5.0.4 does not install... I assmume that I am missing something though, as the newer version is 10 Mbytes bigger!

The 5.0.4 version was corrupt on our server. I fixed it, so now it shoudl also work fine (although there are only very minor changes between 5.0.3 and 5.0.4).

/Stefan

Hi DRS4 Experts,

I have an extremely naive question: Is there any official macro to unpack the DRS4 binary files? All I am looking to do is to plot a few of my waveforms and manipulate them in root. I am using OSX 10.10 and ROOT 5.34.

Thanks in advance,

Will

I should of course mention that I looked through the DRS4 website and didn't see anything obvious: https://www.psi.ch/drs/evaluation-board

Thanks,

Will

Have a look here: elog:361

Hi Stefan,

This is absolutely perfect.

Thanks,

Will

There is software for DRS4 board and positron lifetime measurement availiable. Still in beta but works. Its usable for measuring time between pulses in two or three channels and histogramming that time. (May be time of flight measurement should be tested too) Project code is here: http://sourceforge.net/projects/qtpals/. More about it is here http://iopscience.iop.org/1742-6596/505/1/012044/. Still tested only with v3 and v4 evaluation board, but should work with new callibration in v5 board too.

Hi

I have just installed DRS4, but when I try to view it from the USB it don't work. Why?

  [  .../home  $] lsusb -d 04b4:1175 -v

Bus 002 Device 008: ID 04b4:1175 Cypress Semiconductor Corp.
Couldn't open device, some information will be missing
Device Descriptor:

Hi

Did you copy the udev rule 41-drs.rules into /etc/udev/rules.d/ ?

Which operating system are you using?

Cheers
Felix

Hi,
  I have a question using a data acquisition card base on DRS4 chip. How can I measure the time between several samples of one channel，with the accuracy of like nanoseconds , for I am using the internal trigger. Is there any complete work about this problem？
  One conceivable way is using an global counter in FPGA, but I'm wondering how to synch the counter with the DRS4 sampling.
  Thanks.
Chenfei Yang

> Hi,
>   I have a question using a data acquisition card base on DRS4 chip. How can I measure the time between several samples of one channel，with the accuracy of like nanoseconds , for I am using the internal trigger. Is there any complete work about this problem？
>   One conceivable way is using an global counter in FPGA, but I'm wondering how to synch the counter with the DRS4 sampling.
>   Thanks.
> Chenfei Yang

I do not know exactly what you do, so it's hard to give an advice. All I can say that the DRS4 Evaluation Board from PSI allows time measurements between two channels in the order of a few pico seconds. You can download the software for this board from the DRS4 web site and 
have a look how things are done.

The trigger position is not a good time reference, since the trigger position jitters by a few samples. So if you want to measure the time of a signal versus a trigger, you have to put this trigger in a free channel of the DRS4 and use that as a time reference.

Best regards,
Stefan

HI,

We are using the DRS4 Board in the EUDAQ framework [1]. We wrote a a Producer based on the software of the evaluation board, which is using the DRS class/header/src files.

In order to make it work we needed to compile it with a shared object file. [2]

Would it be possbile to include a shared object in the 'official' release? 

Cheers

Felix

[1]https://telescopes.desy.de/EUDAQ

[2]https://github.com/veloxid/DRS4-v5-shared

Hi Felix,

the distribution does not contain any binaries, since there are too many Linux distributions around, so everybody compiles from the sources under Linux. Do you want me to just add libDRS.so to the official Makefile? Actually you are the first one asking for this. Would it be beneficial to have this in the distribution, or can you just maintain your own Makefile in the github repository?

Stefan

Hi Stefan,

That's fine for me. I thought it might be interesting for others as well..

Cheers

Felix

Anyhow it would be nice if you just post your Makefile here, which runs with the standard distribution, so people can use it if needed.

Stefan

Yes of course no problem.

You can download via github https://github.com/veloxid/DRS4-v5-shared and I also put it in the attachment.

It's tested with Ubuntu, Fedora and RHEL.

For mac OSX one needs to create a dylib out of the so file.

Cheers

Felix

Hi

We are working with the DRS 4 V5 version and we investigated an issue with the trigger at rates below ~120 Hz.

As long as we have a trigger rate of more than 125 Hz. everything seems to work fine and we are recording more or less all events.

As soon as we go lower in input trigger rate to 100Hz, we see a drop in trigger rates to approx 15 - 20 Hz.

When we use the new firmware we can see that the busy signal is  0 for much longer times than usual up to .5 seconds.

We made a plot of input trigger rate vs trigger rate of drs: https://plot.ly/~simon.corrodi/316

In the  oscilloscope plots one can see the the trigger in in yellow and the trig out from drs board in blue.

Do you have any idea what could be the reason?

We also

Hi,

We did a further investigation of this problem:

We figured out that this issue seems to be related to the kernel.

We tested it now on two machines with Ubuntu 14.04.2 LTS (kernel 3.16.0-41), one with RHEL 6.6 (kernel 2.6.32) , one with Fedora 20 (kernel 3.18.7) and one with Mac OSX. We see this issue  with the Ubuntu and the fedroa  machines.Both have a kernel above 3.0 while RHEL has a kernel of 2.6

We can repoduce the problem on all input channels as a trigger. 

I will try to find out what could be the cause of it.

Cheers

Felix

I have problems with driver installation on windows 8.1 (software version 5.03). I have sen that that has been an issue before (driver signing) and I would like to know if this has been solved. We run several DRS4 evaluation boards on different PCs all running Win7 without any problems. Therefore we are almost confident that it is related to Win 8.1. Thanks.

Solved. Need to restart Windows 8.1 (64 bit) in recovery mode and dissable driver signing as mandatory. Then it works fine.

Hi, I have a DRS4 v5 evaluation board and I have a novice question about the oscilliscop application. When I connect it to a photo-detector (silicon photo-multiplier to be exact), the signal appears only on one half of the screen, and I cannot change it to be full screen, and pulse to be centered. I tried changing delay time and played around with the settings of the applicaton but no success. I'd apprecite if someone help me on this, probably very simple, problem.

There is a horizontal position slider in the "Horizontal" box on the right side below the trigger delay. Use it.