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Entry  Thu Jan 19 23:26:26 2012, Heejong Kim, drs_exam.cpp for evaluation board version 4 
    Reply  Fri Jan 20 08:09:38 2012, Stefan Ritt, drs_exam.cpp for evaluation board version 4 drs_exam.cpp
       Reply  Fri Jan 20 23:50:39 2012, Heejong Kim, drs_exam.cpp for evaluation board version 4 
Entry  Wed Dec 14 00:44:37 2011, Hao Huan, Synchronization Delay in the Firmware for 8051 Controller 
    Reply  Wed Dec 14 08:55:29 2011, Stefan Ritt, Synchronization Delay in the Firmware for 8051 Controller 
Entry  Mon Dec 12 16:43:04 2011, Stefan Ritt, DC coupled DRS4 input stage DRS4_front_end_DC.pdf
Entry  Thu Apr 14 18:23:53 2011, Bob Hirosky, Fixes to DOScreen.cpp for recent built on linux 
    Reply  Fri Apr 15 08:28:54 2011, Stefan Ritt, Fixes to DOScreen.cpp for recent built on linux 
    Reply  Fri Dec 9 17:45:48 2011, Michael Büker, Fixes to DOScreen.cpp for recent built on linux 
Entry  Mon Oct 31 09:15:02 2011, Zhongwei Du, How to link PMT 
    Reply  Tue Nov 1 11:07:02 2011, Stefan Ritt, How to link PMT 
Entry  Sun Oct 23 23:32:28 2011, Hao Huan, Phase Shift for ADC Readout 
    Reply  Mon Oct 24 10:30:15 2011, Stefan Ritt, Phase Shift for ADC Readout 
Entry  Sat Oct 15 04:45:25 2011, Aurelien Bouvier, DRS4 eval board: readout rate 
    Reply  Sat Oct 22 00:40:02 2011, Stefan Ritt, DRS4 eval board: readout rate 
Entry  Fri Sep 16 22:06:07 2011, Andriy Zatserklyaniy, compilation error for version 4.0.0 on linux 
    Reply  Mon Sep 19 08:53:22 2011, Stefan Ritt, compilation error for version 4.0.0 on linux 
Entry  Wed Sep 7 16:45:17 2011, Guillaume Blanchard, DRS4 and AD9222 
    Reply  Wed Sep 7 16:56:43 2011, Stefan Ritt, DRS4 and AD9222 
    Reply  Wed Sep 7 17:28:25 2011, Hannes Friederich, DRS4 and AD9222 
       Reply  Fri Sep 9 09:28:57 2011, Guillaume Blanchard, DRS4 and AD9222 
          Reply  Fri Sep 9 09:31:33 2011, Stefan Ritt, DRS4 and AD9222 
Entry  Mon Jul 19 12:07:04 2010, Jinhong Wang, Fixed Patter Timing Jitter 
    Reply  Mon Jul 19 12:47:17 2010, Stefan Ritt, Fixed Patter Timing Jitter Capture.png
       Reply  Mon Jul 4 05:06:00 2011, Jinhong Wang, Fixed Patter Timing Jitter hist_stoppos.jpg
          Reply  Tue Jul 5 10:09:43 2011, Stefan Ritt, Fixed Patter Timing Jitter nonlinearity.png
             Reply  Tue Jul 12 09:49:08 2011, Jinhong Wang, Fixed Patter Timing Jitter 131MHz.jpg
                Reply  Wed Jul 13 04:26:52 2011, Stefan Ritt, Fixed Patter Timing Jitter 
Entry  Wed Jun 1 09:57:43 2011, Martin Petriska, Removing spikes 
    Reply  Thu Jun 2 21:01:29 2011, Stefan Ritt, Removing spikes 
Entry  Fri Feb 25 10:13:51 2011, Stefan Ritt, Announcement digital pulse processing workshop 
Entry  Sat Feb 19 17:25:29 2011, S S Upadhya, how to synchronize Sampling frequency of two evaluation boards 
    Reply  Sat Feb 19 22:46:35 2011, Stefan Ritt, how to synchronize Sampling frequency of two evaluation boards 
       Reply  Mon Feb 21 08:10:31 2011, Stefan Ritt, how to synchronize Sampling frequency of two evaluation boards 
          Reply  Mon Feb 21 12:42:33 2011, S S Upadhya, how to synchronize Sampling frequency of two evaluation boards 
Entry  Tue May 18 09:24:02 2010, Stefan Ritt, Reference design for DRS4 active input buffer ac.pngac_bw.pngdc.pngdc_bw.pngDRS4_ft_V3.jpg
    Reply  Tue Oct 12 03:53:37 2010, Jinhong Wang, Reference design for DRS4 active input buffer 
       Reply  Tue Nov 16 16:38:06 2010, Stefan Ritt, Reference design for DRS4 active input buffer 
Entry  Wed Jul 21 10:46:32 2010, Jinhong Wang, ENOB of DRS 
    Reply  Wed Jul 21 10:58:20 2010, Stefan Ritt, ENOB of DRS 
Entry  Mon Jul 12 16:07:37 2010, Stefan Ritt, Announcement evaluation board V3 eval3.png
Entry  Tue Jun 22 10:50:19 2010, Jinhong Wang, Reset of DRS4 
    Reply  Tue Jun 22 11:02:30 2010, Stefan Ritt, Reset of DRS4 
       Reply  Tue Jun 22 11:29:26 2010, Jinhong Wang, Reset of DRS4 
          Reply  Tue Jun 22 11:35:18 2010, Stefan Ritt, Reset of DRS4 
             Reply  Tue Jun 22 11:37:42 2010, Jinhong Wang, Reset of DRS4 
Entry  Thu May 13 19:14:27 2010, Hao Huan, DVDD Problem of DRS 4 
    Reply  Fri May 14 08:40:14 2010, Stefan Ritt, DVDD Problem of DRS 4 
       Reply  Tue May 18 01:47:59 2010, Hao Huan, DVDD Problem of DRS 4 
          Reply  Tue May 18 08:23:07 2010, Stefan Ritt, DVDD Problem of DRS 4 
             Reply  Wed May 19 02:24:12 2010, Hao Huan, DVDD Problem of DRS 4 
                Reply  Wed May 19 09:16:02 2010, Stefan Ritt, DVDD Problem of DRS 4 
                   Reply  Fri Jun 18 11:31:20 2010, Jinhong Wang, DVDD Problem of DRS 4 
                      Reply  Fri Jun 18 11:45:18 2010, Stefan Ritt, DVDD Problem of DRS 4 
                         Reply  Sat Jun 19 10:09:18 2010, Jinhong Wang, DVDD Problem of DRS 4 
Entry  Wed May 26 19:18:09 2010, Hao Huan, High Frequency Input for DRS 
    Reply  Tue Jun 1 13:36:18 2010, Stefan Ritt, High Frequency Input for DRS 
Entry  Sun May 2 18:36:14 2010, Ignacio Diéguez Estremera, DRS4 chip model 
    Reply  Mon May 3 11:09:12 2010, Stefan Ritt, DRS4 chip model 
       Reply  Mon May 3 17:06:02 2010, Ignacio Diéguez Estremera, DRS4 chip model 
          Reply  Mon May 3 17:10:29 2010, Stefan Ritt, DRS4 chip model 
             Reply  Mon May 3 23:21:55 2010, Ignacio Diéguez Estremera, DRS4 chip model 
                Reply  Tue May 4 11:26:21 2010, Stefan Ritt, DRS4 chip model DRS4_S-Parameter.pdf
                   Reply  Tue May 4 16:23:16 2010, Ignacio Diéguez Estremera, DRS4 chip model 
                   Reply  Wed May 12 11:47:39 2010, Jinhong Wang, DRS4 chip model 
                      Reply  Wed May 12 16:26:12 2010, Stefan Ritt, DRS4 chip model 
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