DRS4 Forum
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Entry  Sat Oct 15 04:45:25 2011, Aurelien Bouvier, DRS4 eval board: readout rate 
    Reply  Sat Oct 22 00:40:02 2011, Stefan Ritt, DRS4 eval board: readout rate 
Entry  Fri Sep 16 22:06:07 2011, Andriy Zatserklyaniy, compilation error for version 4.0.0 on linux 
    Reply  Mon Sep 19 08:53:22 2011, Stefan Ritt, compilation error for version 4.0.0 on linux 
Entry  Wed Sep 7 16:45:17 2011, Guillaume Blanchard, DRS4 and AD9222 
    Reply  Wed Sep 7 16:56:43 2011, Stefan Ritt, DRS4 and AD9222 
    Reply  Wed Sep 7 17:28:25 2011, Hannes Friederich, DRS4 and AD9222 
       Reply  Fri Sep 9 09:28:57 2011, Guillaume Blanchard, DRS4 and AD9222 
          Reply  Fri Sep 9 09:31:33 2011, Stefan Ritt, DRS4 and AD9222 
Entry  Mon Jul 19 12:07:04 2010, Jinhong Wang, Fixed Patter Timing Jitter 
    Reply  Mon Jul 19 12:47:17 2010, Stefan Ritt, Fixed Patter Timing Jitter Capture.png
       Reply  Mon Jul 4 05:06:00 2011, Jinhong Wang, Fixed Patter Timing Jitter hist_stoppos.jpg
          Reply  Tue Jul 5 10:09:43 2011, Stefan Ritt, Fixed Patter Timing Jitter nonlinearity.png
             Reply  Tue Jul 12 09:49:08 2011, Jinhong Wang, Fixed Patter Timing Jitter 131MHz.jpg
                Reply  Wed Jul 13 04:26:52 2011, Stefan Ritt, Fixed Patter Timing Jitter 
Entry  Wed Jun 1 09:57:43 2011, Martin Petriska, Removing spikes 
    Reply  Thu Jun 2 21:01:29 2011, Stefan Ritt, Removing spikes 
Entry  Fri Feb 25 10:13:51 2011, Stefan Ritt, Announcement digital pulse processing workshop 
Entry  Sat Feb 19 17:25:29 2011, S S Upadhya, how to synchronize Sampling frequency of two evaluation boards 
    Reply  Sat Feb 19 22:46:35 2011, Stefan Ritt, how to synchronize Sampling frequency of two evaluation boards 
       Reply  Mon Feb 21 08:10:31 2011, Stefan Ritt, how to synchronize Sampling frequency of two evaluation boards 
          Reply  Mon Feb 21 12:42:33 2011, S S Upadhya, how to synchronize Sampling frequency of two evaluation boards 
Entry  Tue May 18 09:24:02 2010, Stefan Ritt, Reference design for DRS4 active input buffer ac.pngac_bw.pngdc.pngdc_bw.pngDRS4_ft_V3.jpg
    Reply  Tue Oct 12 03:53:37 2010, Jinhong Wang, Reference design for DRS4 active input buffer 
       Reply  Tue Nov 16 16:38:06 2010, Stefan Ritt, Reference design for DRS4 active input buffer 
Entry  Wed Jul 21 10:46:32 2010, Jinhong Wang, ENOB of DRS 
    Reply  Wed Jul 21 10:58:20 2010, Stefan Ritt, ENOB of DRS 
Entry  Mon Jul 12 16:07:37 2010, Stefan Ritt, Announcement evaluation board V3 eval3.png
Entry  Tue Jun 22 10:50:19 2010, Jinhong Wang, Reset of DRS4 
    Reply  Tue Jun 22 11:02:30 2010, Stefan Ritt, Reset of DRS4 
       Reply  Tue Jun 22 11:29:26 2010, Jinhong Wang, Reset of DRS4 
          Reply  Tue Jun 22 11:35:18 2010, Stefan Ritt, Reset of DRS4 
             Reply  Tue Jun 22 11:37:42 2010, Jinhong Wang, Reset of DRS4 
Entry  Thu May 13 19:14:27 2010, Hao Huan, DVDD Problem of DRS 4 
    Reply  Fri May 14 08:40:14 2010, Stefan Ritt, DVDD Problem of DRS 4 
       Reply  Tue May 18 01:47:59 2010, Hao Huan, DVDD Problem of DRS 4 
          Reply  Tue May 18 08:23:07 2010, Stefan Ritt, DVDD Problem of DRS 4 
             Reply  Wed May 19 02:24:12 2010, Hao Huan, DVDD Problem of DRS 4 
                Reply  Wed May 19 09:16:02 2010, Stefan Ritt, DVDD Problem of DRS 4 
                   Reply  Fri Jun 18 11:31:20 2010, Jinhong Wang, DVDD Problem of DRS 4 
                      Reply  Fri Jun 18 11:45:18 2010, Stefan Ritt, DVDD Problem of DRS 4 
                         Reply  Sat Jun 19 10:09:18 2010, Jinhong Wang, DVDD Problem of DRS 4 
Entry  Wed May 26 19:18:09 2010, Hao Huan, High Frequency Input for DRS 
    Reply  Tue Jun 1 13:36:18 2010, Stefan Ritt, High Frequency Input for DRS 
Entry  Sun May 2 18:36:14 2010, Ignacio Diéguez Estremera, DRS4 chip model 
    Reply  Mon May 3 11:09:12 2010, Stefan Ritt, DRS4 chip model 
       Reply  Mon May 3 17:06:02 2010, Ignacio Diéguez Estremera, DRS4 chip model 
          Reply  Mon May 3 17:10:29 2010, Stefan Ritt, DRS4 chip model 
             Reply  Mon May 3 23:21:55 2010, Ignacio Diéguez Estremera, DRS4 chip model 
                Reply  Tue May 4 11:26:21 2010, Stefan Ritt, DRS4 chip model DRS4_S-Parameter.pdf
                   Reply  Tue May 4 16:23:16 2010, Ignacio Diéguez Estremera, DRS4 chip model 
                   Reply  Wed May 12 11:47:39 2010, Jinhong Wang, DRS4 chip model 
                      Reply  Wed May 12 16:26:12 2010, Stefan Ritt, DRS4 chip model 
Entry  Wed May 5 22:30:50 2010, Ignacio Diéguez Estremera, Random noise spec in datasheet 
    Reply  Thu May 6 08:15:39 2010, Stefan Ritt, Random noise spec in datasheet 
Entry  Tue Mar 30 22:57:34 2010, Hao Huan, ROFS Configuration 
    Reply  Thu Apr 15 13:48:40 2010, Stefan Ritt, ROFS Configuration 
Entry  Mon Apr 5 17:50:39 2010, Heejong Kim, version 1.2 evaluation board with firmware 13279? 
    Reply  Wed Apr 14 16:34:28 2010, Stefan Ritt, version 1.2 evaluation board with firmware 13279? 
Entry  Tue Apr 28 11:44:07 2009, Stefan Ritt, Simple example application to read a DRS evaluation board drs_exam.cpp
    Reply  Wed Apr 29 07:57:33 2009, Stefan Ritt, Simple example application to read a DRS evaluation board DRS.cppDRS.h
    Reply  Mon Apr 5 17:57:41 2010, Heejong Kim, Simple example application to read a DRS evaluation board 
       Reply  Tue Apr 13 14:15:16 2010, Stefan Ritt, Simple example application to read a DRS evaluation board 
Entry  Fri Apr 9 17:14:45 2010, Hao Huan, Baseline Variation In Data 
    Reply  Tue Apr 13 13:56:07 2010, Stefan Ritt, Baseline Variation In Data 
Entry  Tue Apr 13 10:45:18 2010, lorenzo neri, evaluation board used like a counter 
    Reply  Tue Apr 13 13:12:43 2010, Stefan Ritt, evaluation board used like a counter 
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