 Wed Jan 20 12:14:49 2021, Taegyu Lee, drs4 persistence
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Dear all,
I have a question about the function that drs4 can perform.
Is there any function in drs4 that is analogous to that of "persistence display" in oscilloscope?? (accumulating pulses) |
 Wed Jan 20 17:37:51 2021, Stefan Ritt, drs4 persistence
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The chip itself can only sample a single waveform, that must be done in the attached software. The current DRSOscilloscope software coming with the evaluation
board has not yet implemented that, but if you write your own software you can do so.
Taegyu |
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Thu Dec 17 09:29:43 2020, Alex Myczko, drs sources on github?
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Are there plans to add the drs software to github? (asking because I have users @ethz.ch that want to use it on debian,
thus I'm creating official debian packages of it, if license allows so, but talking to upstream (the developers) would be
much easier on github (or irc) than on this "DRS4 Discussion Forum".
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Thu Dec 17 11:31:34 2020, Stefan Ritt, drs sources on github?
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Not github, but bitbucket: https://bitbucket.org/ritt/drs4eb/src/master/
But development kind of stalled, so there will be updates only in case of severe bugs, which are kind of gone after 10 years now.
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Wed Oct 21 15:03:13 2020, Seiya Nozaki, Timing diagram of SROUT/SRIN signal to write/read a write shift register 
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Dear Stefan,
I have questions about the timing diagram of SROUT/SRIN signal to write/read a write shift register. |
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Tue Oct 27 13:37:23 2020, Stefan Ritt, Timing diagram of SROUT/SRIN signal to write/read a write shift register
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Dear Seiya,
1) That's correct. SRIN is ampled at the falling edge. Pleae make sure to obey the hold-time as written in the datasheet. P.12, Fig. 11:
SRIN must be stable before the falling edge of SRCLK and tH after the falling clock. tH is 5ns according to table 1. |
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Tue Oct 27 15:02:09 2020, Seiya Nozaki, Timing diagram of SROUT/SRIN signal to write/read a write shift register
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Dear Stefan,
Thank you for your reply. |
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Tue Oct 27 15:24:38 2020, Stefan Ritt, Timing diagram of SROUT/SRIN signal to write/read a write shift register
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This is a static shift register, so you can make the clock as slow as you want. Actually I don't use a "clock", I just use a data pin I
control via a state machine in the VHDL code. This way I have more control over the edges. I need several (internal) clock cycles to produce one SRCLK
clock cycle, but that does not matter for the DRS. |
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Wed Oct 28 04:32:19 2020, Seiya Nozaki, Timing diagram of SROUT/SRIN signal to write/read a write shift register
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Dear Stefan,
OK, it's good to hear! Thank you! |
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Tue Sep 22 17:45:26 2020, Elmer Grundeman, External triggering
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Dear all,
I had a question about timing jitter and external triggering.
I trigger the board externally with a 3V pulse from a DG645 delay generator and as a test I use the gated charge function to integrate another |
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Wed Oct 7 10:56:03 2020, Stefan Ritt, External triggering
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The trigger is there only to trigger the chip, but cannot be used as a precise time reference. If you want to measure precise timing, do this always
BETWEEN two inputs, never between an input and the trigger. You might want to split and delay your trigger signal and feed one copy to another input of
the evaluation board as your reference. |
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Wed Oct 7 11:17:52 2020, Elmer Grundeman, External triggering
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I will try that, thanks!
Stefan
Ritt wrote:
The trigger is there only to trigger the chip, but cannot be used as |
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Mon Aug 31 16:44:12 2020, Hans Steiger, Channel Cascading
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Dear All,
I have a board with Channel Cascading Option. I have the problem, that it seems to be impossible to run all 4 Channels simultaneously for digitizing
pulses. I can just run even or odd channels but not even and odd ones? If I run in combined option, My question: If a board comes with this combined option, |
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Mon Aug 31 17:17:30 2020, Stefan Ritt, Channel Cascading
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If you have a board with cascading option, it should show the "combined" option in the 2048-bin option enabled (not grayed), as in the
attached screen shot. If the 2048-bin option is all greyed out, the system does not recognize the cascading option. If your board has a sticker "2048
bin" and you still see the 2048-bin option greyed out, it might mean that a resistor on that board has been forgotten. If you do not see the "2048 |
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Sat Aug 29 22:00:30 2020, Hans Steiger, Dynamic Range Evaluation Board and Software
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Dear Evaluation Board Team,
currently I am facing the problem of digitizing pulses with an amplitude of -0.6V to -0.8V. As the dynamic range of the board is 1Vpp, this should |
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Mon Aug 31 10:52:42 2020, Stefan Ritt, Dynamic Range Evaluation Board and Software
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You cannot go below -0.5V for the inputs, since the board does not have an internal negative power supply, which would be necessary for that. If you
have -0.8V pulses, the easiest is to use a passive inverter at the input to convert it to a 0.8V pulse.
Stefan |
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Wed Feb 20 08:03:04 2019, Lev Pavlov, meg?
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Hey. Strange problem. Why does the compiler refer there at all? Library installed drsosc works
LINK : fatal error LNK1104: cannot open file "C:\meg\online\drivers\drs\libusb-1.0\libusb-1.0.lib" |
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Wed Feb 20 08:08:42 2019, Stefan Ritt, meg?
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You have to change the path to libusb-1.0.lib to the one where you installed it.
Stefan
Lev |
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Wed Feb 20 12:13:44 2019, Lev Pavlov, meg?
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Great, drs_exam compiles without problems. Now when you run the compiled file drs_exam writes board not found, but drsosc and drscl work without problems.
What could possibly be the matter?
thanks for your patience |
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Wed Feb 20 12:56:56 2019, Stefan Ritt, meg?
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No idea. Maye some access problem. Have you tried to start your program under an admin account?
Stefan
Lev |
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Thu Feb 21 09:51:24 2019, Lev Pavlov, no board found
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Hey. Yes, the program is running as administrator. By the way, this is win10. Your drs_exam works fine. My drs_exam compiled wrote no board found. Maybe
this is a problem like in the post https://elog.psi.ch/elogs/DRS4+Forum/698. Maybe there were solutions to the problems?
Thank You |
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Thu Feb 21 09:57:53 2019, Stefan Ritt, no board found
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Could be. Have you tried that elog:657
Stefan
Lev |
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Mon Feb 25 08:40:44 2019, Lev Pavlov, no board found
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Hello. When compiling drs_exam, do you need to use a "static "version of usblib or a "dynamic" version?"The problem
with "no board found" is not solved. Thanks for your help. |
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Mon Feb 25 08:48:27 2019, Stefan Ritt, no board found
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"dynamic" or "static" does not matter, as long as you don't use your program on another computer. I have no more idea about the
"no board found" problem. It works ok on all computers I tried at our lab.
Stefan |
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Tue Jul 28 22:40:44 2020, Razvan Stefan Gornea, no board found
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I have a very similar problem, the command line doesn't work but the oscilloscope program does! Tried to fix it using Zadig driver update. Using
Windows 7....
DRS command line tool, Revision 21435 |
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Tue May 26 11:10:27 2020, xggg, Domino wave
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Hi Stefan,
According to the datasheet DRS_rev09, the write signal is always 16 cells wide. So when the domino wave runs in infinite mode and be stopped
by setting DENABLE low , there are always 16 cells capicitors tracking the input signal . It means that the effective sample cells is 1024-16=1008? That's |
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Tue May 26 12:44:16 2020, Stefan Ritt, Domino wave
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Look at the attached picture. For simplicity, only 4 cells are open and tracking the input signal. Time is flowing from top to bottom. So initially,
a train of 4 cells is open. When it's stopped, the train stops not immediately, but kind of "runs against a wall" at the stop cell. So each
cell is open for four time ticks effectively, and you can use all 1024 cells. |
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Thu May 21 07:18:48 2020, Keita Mizukoshi, DRS4 Evaluation board control tool 'drscl' with macro file
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Dear experts,
I would like to use DRS4 evaluation board as DAQ system for small, table-top experiment. |
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Fri May 22 12:53:33 2020, Stefan Ritt, DRS4 Evaluation board control tool 'drscl' with macro file
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There is an example program in the distribution under software/drscl/drs_exam.cpp which is a stand-alone program to do what you need. It uses the C library
coming with the distribution. It configureres the board, defines a trigger, and then writes a few waveforms into a file. You can use it as a starting point
for your development. If you need any other language, you have to develop bindings to the C library. |
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Mon May 25 03:36:12 2020, Keita Mizukoshi, DRS4 Evaluation board control tool 'drscl' with macro file
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Thank you very much. That is what I wanted.
Stefan
Ritt wrote:
There is an example program in the distribution under software/drscl/drs_exam.cpp |
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Thu May 21 07:38:05 2020, Keita Mizukoshi, Type check at DOFrame.h in official software
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Hi,
I've failured to compile official software. The cause is the following line. |
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Fri May 22 13:24:51 2020, Stefan Ritt, Type check at DOFrame.h in official software
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The software is a bit outdated, I will soon make a new release.
In meantime, you can replace that like with
bool GetRefclk(int board) { return m_refClk[board]; } |
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Mon Mar 23 15:03:28 2020, Ajay Krishnamurthy, USB trigger issue
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Hello,
I had forgotten to disable the turn off the power to the USB drive on Windows and DRS4 stopped triggering. Now, we are all on quarantine and
I am unable to reset the board to normal function. Are there any commands to reset the board remotely. I tried all of the default Windows based solutions |
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Wed Oct 23 17:56:26 2019, John Jendzurski, Computing corrected time from binary data...what is t_0,0?
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In the equations for computing the corrected time for channels other than channel 1, does anyone know what the term t0,0 refers
to? This is the last term in the last equation on page 24 of DRS4 Evaluation Board User’s Manual, Board Revision 5 as of January 2014, Last
revised: April 27, 2016. |
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Fri Oct 25 16:39:07 2019, Stefan Ritt, Computing corrected time from binary data...what is t_0,0?
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t0,0 refers to the time of cell #0 of channel #0. So basically you keep channel 0 fixed, calculate the difference of each channel's cell #0 in respect
to channel 0, and align all channels except channel 0 so that their cell #0 has the same value. There is an inconsistency between the channel numbering.
The formula uses 0...3 and the manual says "channel 1" but it means actually the first channel, which uses index "0". |
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Mon Oct 14 09:32:33 2019, Danyang, how to acquire the stop position with channel cascading
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Hi Steffan,
In DSR4 DATASHEET Rev.0.9 Page13, there is a paragraph "If the DRS4 is configured for channel cascading
or daisy chaining, it is necessary to know which the current channel is where the sampling has been stopped. This can be |
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Mon Oct 14 10:14:46 2019, Stefan Ritt, how to acquire the stop position with channel cascading
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You first set A3-A0, on the next clock cycle you issue pulses on srclk, and about 10ns after each clock pulse the output shows up at srout. Best is to
verity this with an oscilloscope.
The radout of the shift register is independent of the readout mode, so you can use with with MUXOUT as well. |
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Mon Oct 14 11:45:06 2019, Danyang, how to acquire the stop position with channel cascading
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I tried the logic in my designed board. The results are shown in the picture: Srout keeps low when A3-A0 is
set to 1101 and srclk is set as you mentioned. And the drs4 chip does not output sine wave in such configuration.
Srout signal only reacts after the rsrload signal is pulled high and A3-A0 is not 1101. |
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Mon Oct 14 12:56:13 2019, Stefan Ritt, how to acquire the stop position with channel cascading
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Note that you have to read out the Write Shift Register only if you do channel cascading, e.g. configuring the chip with 4x2048 bins by setting the Write
Shift Register to 01010101b. Then the Write Shift Register tells you in which 1024-bin segment the Domino Wave has been stopped. If you use the normal
8x1024 bin mode, you don't have to read out the Write Shift Register since it continas only 1's. |
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Mon Oct 14 13:44:26 2019, Danyang, how to acquire the stop position with channel cascading
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Yes, firstly I configured the chip with 4x2048 bins by setting the Write Shift Register to 01010101b， A3-A0 keeps 1101----> secondly
I enabled the domino wave, wait some time for stable, A3-A0 keeps 1111 ---->thirdly stops the domino wave when the trigger comes,
A3-A0 keeps 1101 (or 1010, 0000)----> forthly send the clock pulse to the srclk pin, A3-A0 keeps 1101, srout |
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Mon Oct 14 15:27:09 2019, Stefan Ritt, how to acquire the stop position with channel cascading
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If you configure the Write Shift Register with 01010101b, then all you have to do after a trigger is to set A3-A0 to 1101. The WSROUT pin shows you then
either ther state 01010101b or 10101010b, you the pin should be 1 or 0, and that's all you need. The Write Shift Register is NOT routed to the SROUT
pin, you only see it at the WSROUT pin. |
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Tue Oct 15 08:14:17 2019, Danyang, how to acquire the stop position with channel cascading
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Thanks a lot. The problem is solved when A3-A0 is set 1101 and srclk keeps low.
Best Regards,
Danyang |
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Fri Sep 13 15:27:41 2019, Arseny Rybnikov, Scaler / How to modify the firmware to change the scaler integration time
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Hello,
We want to use the inner DRS4 counter(scaler) within more than the 100ms integration time. We guess that we need to modify the original
firmware around this point: |
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Tue Aug 27 08:33:22 2019, chinmay basu, DRS4
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| Is DRS4 suitable for use with Silicon surface barrier detectors? |
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Tue Aug 27 09:14:03 2019, Stefan Ritt, DRS4
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Is a 5 GSPS oscilloscope suitable for use with Silicon surface barier detectors?
chinmay
basu wrote:
Is DRS4 suitable for use with Silicon surface barrier detectors? |
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Mon Aug 19 23:01:22 2019, Bill Ashmanskas, should one deassert DENABLE while writing the write-shift register?
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Hi Stefan,
We have for some time now been using custom firmware on a custom board to read waveforms out of DRS4 chips. Now we are working on cascaded
readout mode, 4 channels @ 2048 samples, WSREG=0x55, in order to allow for longer trigger latency. |
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Tue Aug 20 10:44:45 2019, Stefan Ritt, should one deassert DENABLE while writing the write-shift register?
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Hi Bill,
you keep DENABLE active all the time to keep the Domino Wave running, but you deassert DWRITE if you change any register via SRCLK. There is
no shadow register, just a simple shift register, but with DWRITE being low, the domino circuitry does not touch it. |
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Tue Aug 20 16:05:21 2019, Bill Ashmanskas, should one deassert DENABLE while writing the write-shift register?
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Aha -- many thanks. I think what tripped up my test logic is that the "done" state in drs4_eval5_app.vhd that executes post-readout sets
DWRITE back to 1 (drs_write_set). If one then writes to FPGA register 5 while the FSM is in the "idle" state, the conf_strobe and wsr_strobe
states occur with DWRITE and DENABLE both asserted. This is if one sets the "dactive" bit in the FPGA app code, which is probably not the |
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Thu Jul 18 01:03:44 2019, Ismael Garcia, Trace Impedance
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Hi Steffan,
I'm an engineer at UCLA developing a board with the DRS4 chip. Our team has a question on |
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Thu Jul 18 11:37:56 2019, Stefan Ritt, Trace Impedance
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The requiremnet is the same as for any high speed analog board, there is othing special with the DRS4. If you want to terminate your line with 50 Ohms
and you want a matched impedance layout, you route all lines with 50 Ohms impedance. Truth is however that nothing is perfect. The SMA connector is not
exactly 50 Ohm, the PCB gets a 10-20% variation depending on the manufacturer. So even if you try hard, you will never have a 50 Ohm matched impedance. |
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Fri Jul 19 01:37:09 2019, Ismael Garcia, Trace Impedance
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When you're refering to laying a 50 Ohm trace, you're referring to the SMA input and not the interface between the output of the Op-AMP(THS4508)
buffer
and the inputs of the DRS4(IN0-IN8). Is there a recommended diffential impedance for IN0-IN8? |
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Sat Jul 20 12:28:14 2019, Stefan Ritt, Trace Impedance
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The DRS4 input is high impedance. So if you like you can terminate it with 100 Ohm differentially and route it with 100 Ohm. But if you keep the lines
short, the reflection is negligible. That’s what we made on the evaluation board.
Ismael |
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Sat Jul 13 01:00:15 2019, Brendan Posehn, Evaluation Board Test Functionality
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Hello,
I have recently obtained a DRS4 Evaluation Board (V5), but I am unable to register signals when using the DRS Oscilloscope application. There
seems to be some difference in noise when I have an input connected to a signal or not, but I am unable to view a simple, 0.2V amplitude square wave or |
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Mon Jul 15 17:26:50 2019, Stefan Ritt, Evaluation Board Test Functionality
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Have you set the trigger correctly to the channel with your signal, polarity and level? Do you undersand the difference between normal and auto trigger?
Why don't you post a screendump. Are you ABSOLUTELY SURE that you have a signal on your cable? Have you tried with another oscilloscope? Are you sure
that your SMA connector is good? |
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Mon Jul 15 19:34:25 2019, Brendan Posehn, Evaluation Board Test Functionality
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Hello Stefan,
Thanks for the quick reply. The issue was a faulty SMA connector, should have checked this first. Signal looks good now.
Thanks for your time, |
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Tue Jun 25 23:04:29 2019, Si Xie, drs_exam is always reading out a sin wave
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We are using the drs_exam.cpp to read out waveforms, but it seems to be outputting only sin waves on all channels - as if it was reading out the simulated
waveform from the oscilloscope program if we run it without the board plugged in. Does anyone know what is causing this?
We are taking data with a pulser plugged into channel 1, which produces a single pulse with width of 8ns, and nothing plugged into channel |
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Wed Jun 26 13:08:42 2019, Stefan Ritt, drs_exam is always reading out a sin wave
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Sure, that’s correct. The example program turns on the internal sine wave generator in case people don’t have a real signal. That’s
why it’s called „example“. Find the code which turns on the generator and change it. You will also have to change the trigger settings
depending on your actual signal. |
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Wed Jun 26 15:10:09 2019, Si Xie, drs_exam is always reading out a sin wave
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I see. Where is the code that we can use to turn off the generator? I thought the example is taking data with CH1 as the trigger.
For our board, which is BoardType == 9, it is running these lines:
b->EnableTrigger(1, 0); // enable hardware trigger |
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Mon Jul 8 14:29:12 2019, Stefan Ritt, drs_exam is always reading out a sin wave
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Actually in the original drs_exam.cpp the sine wave oscillator is turned off with this command
/* use following line to turn on the internal 100 MHz clock connected to all channels */
//b->EnableTcal(1); |
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Wed Mar 7 22:49:38 2018, Rodrigo Trindade de Menezes, Running drs_example.cpp
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Hello,
We have been using the DRS4 evaluation board (S/N 2636) that works with the scope application. However we are trying to run the DRS4 evaluation
board remotely by modifying the drs_exam.cpp to acquire and store data continuously. |
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Thu Mar 8 22:54:20 2018, Rodrigo Trindade de Menezes, Running drs_example.cpp
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We found a way to solve the previous problem, but right now when we try to set the input range only -0.5 to 0.5 is working. When we set the function
"SetInputRange(0.5)" for 0 to 1V the output is all zeros and with "SetInputRange(0.45)" we just get all the outputs -49.9mV.
What does that means? How to fix? |
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Fri May 4 12:11:57 2018, Stefan Ritt, Running drs_example.cpp
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And here is the second part of your answer: When you change the input range, you have to redo the voltage calibration. Best is if you do that in the
DRSOsc program, then you see that it's working. Then start your custom program and use the same range.
Stefan |
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Wed Jun 26 15:17:51 2019, Si Xie, Running drs_example.cpp
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Hi Rodrigo, I'm wondering how you solved your original triggering problem. We are also having trouble with collecting data continously using the
example. Thanks.
Rodrigo |
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Mon Mar 19 15:12:02 2018, Stefan Ritt, Running drs_example.cpp
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The time channel is already calibrated in ns. So for 5 GSPS, the time scale goes from zero to 200. Concerning your other issues I will come back to you
later.
Stefan |