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Entry  Sat Feb 20 01:56:05 2010, Hao Huan, PLLLCK signal of DRS4 
    Reply  Sat Feb 20 09:54:48 2010, Stefan Ritt, PLLLCK signal of DRS4 start_1ghz.png
       Reply  Sun Feb 21 00:46:01 2010, Hao Huan, PLLLCK signal of DRS4 
          Reply  Sun Feb 21 13:47:03 2010, Stefan Ritt, PLLLCK signal of DRS4 
             Reply  Sun Feb 21 20:27:46 2010, Hao Huan, PLLLCK signal of DRS4 
                Reply  Sun Feb 21 20:33:57 2010, Stefan Ritt, PLLLCK signal of DRS4 
                   Reply  Mon Feb 22 17:23:59 2010, Hao Huan, PLLLCK signal of DRS4 
                      Reply  Wed Mar 3 14:37:40 2010, Stefan Ritt, PLLLCK signal of DRS4 
Entry  Sun Feb 21 13:41:35 2010, Stefan Ritt, Real Time Conference 2010 
Entry  Mon Feb 15 19:43:34 2010, Ron Grazioso, Problem reading oscilloscope binary waveform output test_pulse.pngpulse_IDL.png
    Reply  Tue Feb 16 09:38:59 2010, Stefan Ritt, Problem reading oscilloscope binary waveform output 
Entry  Wed Feb 10 02:57:55 2010, pepe sanchez lopez, Hello 
    Reply  Wed Feb 10 15:35:09 2010, Stefan Ritt, Hello 
Entry  Sun Jan 31 23:52:15 2010, Hao Huan, Failure In Flashing Xilinx PROM 
    Reply  Mon Feb 1 08:30:42 2010, Stefan Ritt, Failure In Flashing Xilinx PROM DRS.cppDRS.hdrs4_eval1.mcs
Entry  Wed Dec 30 14:28:33 2009, aliyilmaz, normal_mode_in_drs_exam.cpp 
    Reply  Mon Jan 11 16:32:21 2010, Stefan Ritt, normal_mode_in_drs_exam.cpp 
Entry  Mon Dec 14 10:14:16 2009, Jinhong Wang, Trigger of DRS4 
    Reply  Tue Dec 15 14:38:09 2009, Stefan Ritt, Trigger of DRS4 
       Reply  Mon Dec 21 10:17:05 2009, Jinhong Wang, Trigger of DRS4 
          Reply  Mon Dec 21 16:52:08 2009, Stefan Ritt, Trigger of DRS4 
             Reply  Tue Dec 22 01:30:55 2009, Jinhong Wang, Trigger of DRS4 
                Reply  Tue Dec 22 09:07:27 2009, Stefan Ritt, Trigger of DRS4 
Entry  Fri Oct 30 03:31:54 2009, Jinhong Wang, outline dimension of DRS4 QFN_package.jpg
    Reply  Wed Nov 4 14:42:22 2009, Stefan Ritt, outline dimension of DRS4 qfn76.png
Entry  Mon Oct 19 11:26:29 2009, Jinhong Wang, output common mode voltage of DRS4 
    Reply  Mon Oct 19 12:46:12 2009, Stefan Ritt, output common mode voltage of DRS4 
Entry  Mon Oct 19 09:06:43 2009, Jinhong Wang, BIAS Pin of DRS4 
    Reply  Mon Oct 19 09:13:00 2009, Stefan Ritt, BIAS Pin of DRS4 
Entry  Fri Oct 16 09:51:03 2009, Jinhong Wang, DSR4 Full Readout Mode 
    Reply  Fri Oct 16 10:16:10 2009, Stefan Ritt, DSR4 Full Readout Mode 
Entry  Wed Oct 14 23:53:05 2009, Armin Kolb, DRS_exam using USB Evaluation Board with OS X Makefile
Entry  Wed Oct 7 17:58:20 2009, Stefan Ritt, VDD switch off speed no_res.png100ohm.png
Entry  Tue Oct 6 11:20:39 2009, Stefan Ritt, VDD instability vdd_no_cap.pngvdd_470uf.png
Entry  Thu Jul 9 09:11:03 2009, Stefan Ritt, Current problems with drs_exam.cpp 
Entry  Tue Jul 7 16:39:57 2009, Stefan Ritt, Power up problem and remedy typical_mode.gif
Entry  Mon Apr 27 15:09:49 2009, Stefan Ritt, Amplitude and Timing calibration for DRS4 Evaluation Board uncal.pngcal.png
Entry  Mon Feb 23 09:24:24 2009, Stefan Ritt, Rise-time measurements image001.jpgimage003.jpgsingle.jpg
Entry  Wed Feb 11 12:21:07 2009, Stefan Ritt, Corrected datasheet Rev. 0.8 
Entry  Wed Jan 14 12:02:04 2009, Stefan Ritt, External Trigger Input requirements tap.jpg
    Reply  Wed Jan 14 13:41:44 2009, Stefan Ritt, External Trigger Input requirements 
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