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ID Date Author Subject Text Attachments
  791   Tue May 26 12:44:16 2020 Stefan RittDomino waveLook at the attached picture. For simplicity,
only 4 cells are open and tracking the input
signal. Time is flowing from top to bottom.
 Screenshot_2020-05-26_at_12.43.40_.png 
  790   Tue May 26 11:10:27 2020 xgggDomino waveHi Stefan,

According to the datasheet DRS_rev09,
the write signal is always 16 cells wide.
  
  789   Mon May 25 03:36:12 2020 Keita MizukoshiDRS4 Evaluation board control tool 'drscl' with macro fileThank you very much. That is what I wanted.




  
  788   Fri May 22 13:24:51 2020 Stefan RittType check at DOFrame.h in official softwareThe software is a bit outdated, I will
soon make a new release. 

In meantime, you can replace that
  
  786   Fri May 22 12:53:33 2020 Stefan RittDRS4 Evaluation board control tool 'drscl' with macro fileThere is an example program in the distribution
under software/drscl/drs_exam.cpp which is
a stand-alone program to do what you need.
  
  785   Thu May 21 07:38:05 2020 Keita MizukoshiType check at DOFrame.h in official softwareHi,

 

I've failured to compile official
  
  784   Thu May 21 07:18:48 2020 Keita MizukoshiDRS4 Evaluation board control tool 'drscl' with macro fileDear experts,

 

I would like to use DRS4 evaluation
  
  783   Mon Mar 23 15:03:28 2020 Ajay KrishnamurthyUSB trigger issueHello,

I had forgotten to disable the
turn off the power to the USB drive on Windows
  
  782   Fri Oct 25 16:39:07 2019 Stefan RittComputing corrected time from binary data...what is t_0,0?t0,0 refers to the time of cell #0 of channel
#0. So basically you keep channel 0 fixed,
calculate the difference of each channel's
  
  781   Wed Oct 23 17:56:26 2019 John JendzurskiComputing corrected time from binary data...what is t_0,0?In the equations for computing the corrected
time for channels other than channel 1, does
anyone know what the term t0,0 refers
 Screenshot.png 
  780   Tue Oct 15 08:14:17 2019 Danyanghow to acquire the stop position with channel cascadingThanks a lot. The problem is solved when
A3-A0 is set 1101 and srclk keeps low.

Best Regards,
  
  779   Mon Oct 14 15:27:09 2019 Stefan Ritthow to acquire the stop position with channel cascadingIf you configure the Write Shift Register
with 01010101b, then all you have to do after
a trigger is to set A3-A0 to 1101. The WSROUT
  
  778   Mon Oct 14 13:44:26 2019 Danyanghow to acquire the stop position with channel cascadingYes, firstly I configured the chip
with 4x2048 bins by setting the Write Shift
Register to 01010101b, A3-A0
  
  777   Mon Oct 14 12:56:13 2019 Stefan Ritthow to acquire the stop position with channel cascadingNote that you have to read out the Write
Shift Register only if you do channel cascading,
e.g. configuring the chip with 4x2048 bins
  
  776   Mon Oct 14 11:45:06 2019 Danyanghow to acquire the stop position with channel cascadingI tried the
logic in my designed board.  The results
are shown in the picture: Srout keeps low
 Capture.PNG 
  775   Mon Oct 14 10:14:46 2019 Stefan Ritthow to acquire the stop position with channel cascadingYou first set A3-A0, on the next clock
cycle you issue pulses on srclk, and about
10ns after each clock pulse the output shows
  
  774   Mon Oct 14 09:32:33 2019 Danyanghow to acquire the stop position with channel cascadingHi Steffan,

       In DSR4
DATASHEET Rev.0.9 Page13,  there is
 Capture.PNG 
  773   Fri Sep 13 15:27:41 2019 Arseny RybnikovScaler / How to modify the firmware to change the scaler integration timeHello,

We want to use the inner DRS4 counter(scaler)
within more than the 100ms integration
  
  772   Tue Aug 27 09:14:03 2019 Stefan RittDRS4Is a 5 GSPS oscilloscope suitable for use
with Silicon surface barier detectors?

  
  771   Tue Aug 27 08:33:22 2019 chinmay basuDRS4Is DRS4 suitable for use with Silicon surface
barrier detectors?
  
  770   Tue Aug 20 16:05:21 2019 Bill Ashmanskasshould one deassert DENABLE while writing the write-shift register?Aha -- many thanks.  I think what
tripped up my test logic is that the "done"
state in drs4_eval5_app.vhd that executes
  
  769   Tue Aug 20 10:44:45 2019 Stefan Rittshould one deassert DENABLE while writing the write-shift register?Hi Bill,

you keep DENABLE active all the
time to keep the Domino Wave running, but
  
  768   Mon Aug 19 23:01:22 2019 Bill Ashmanskasshould one deassert DENABLE while writing the write-shift register?Hi Stefan,

We have for some time now been
using custom firmware on a custom board to
  
  767   Sat Jul 20 12:28:14 2019 Stefan RittTrace ImpedanceThe DRS4 input is high impedance. So if
you like you can terminate it with 100 Ohm
differentially and route it with 100 Ohm.
  
  766   Fri Jul 19 01:37:09 2019 Ismael GarciaTrace ImpedanceWhen you're refering to laying a 50
Ohm trace, you're referring to the SMA
input and not the interface between the output
  
  765   Thu Jul 18 11:37:56 2019 Stefan RittTrace ImpedanceThe requiremnet is the same as for any
high speed analog board, there is othing
special with the DRS4. If you want to terminate
  
  764   Thu Jul 18 01:03:44 2019 Ismael GarciaTrace Impedance

Hi Steffan,

         
 DRS4_Analog_IN.PNG 
  763   Mon Jul 15 19:34:25 2019 Brendan PosehnEvaluation Board Test FunctionalityHello Stefan, 

Thanks for the quick reply. The
issue was a faulty SMA connector, should
  
  762   Mon Jul 15 17:26:50 2019 Stefan RittEvaluation Board Test FunctionalityHave you set the trigger correctly to the
channel with your signal, polarity and level?
Do you undersand the difference between normal
  
  761   Sat Jul 13 01:00:15 2019 Brendan PosehnEvaluation Board Test FunctionalityHello, 

I have recently obtained a DRS4
Evaluation Board (V5), but I am unable to
  
  760   Mon Jul 8 14:29:12 2019 Stefan Rittdrs_exam is always reading out a sin waveActually in the original drs_exam.cpp the
sine wave oscillator is turned off with this
command
  
  759   Wed Jun 26 15:17:51 2019 Si XieRunning drs_example.cppHi Rodrigo, I'm wondering how you solved
your original triggering problem. We are
also having trouble with collecting data
  
  758   Wed Jun 26 15:10:09 2019 Si Xiedrs_exam is always reading out a sin waveI see. Where is the code that we can use
to turn off the generator? I thought the
example is taking data with CH1 as the trigger.
  
  757   Wed Jun 26 13:08:42 2019 Stefan Rittdrs_exam is always reading out a sin waveSure, that’s correct. The example
program turns on the internal sine wave generator
in case people don’t have a real signal.
  
  756   Tue Jun 25 23:04:29 2019 Si Xiedrs_exam is always reading out a sin waveWe are using the drs_exam.cpp to read out
waveforms, but it seems to be outputting
only sin waves on all channels - as if it
  
  755   Mon Jun 24 23:07:35 2019 Andrew PeckEvaluation firmware wait_vdd stateDear Stefan, 

Thanks so much for clarifying this.
We made wait_vdd a parameter controlled by
  
  754   Fri Jun 21 12:54:47 2019 Stefan RittEvaluation firmware wait_vdd stateDear Andrew,

the posting you mention is still
accurate. Any power supply will drop when
  
  753   Thu Jun 20 01:36:48 2019 Andrew PeckEvaluation firmware wait_vdd stateDear Stefan,

I am working with others at UCLA
on a custom made board built around the DRS4.
  
  752   Fri Apr 12 12:50:18 2019 Stefan Rittmulti-boardIf you have two signal going through two
cables, the cable have never the same length
(on a scale of picoseconds), and you have
  
  751   Fri Apr 12 09:59:15 2019 Lev Pavlovmulti-board 

I understand this, thanks. But
my Chief does not understand this, he wants
  
  750   Fri Apr 12 09:55:50 2019 Stefan Rittmulti-boardSubtract 16 ns from your measured value
;-)

Stefan
  
  749   Fri Apr 12 09:39:30 2019 Lev Pavlovmulti-board

Good afternoon, I use 5 boards in
multi-mode, everything is connected according
to the instructions. Can I measure the phase
  
  748   Thu Mar 14 03:43:49 2019 Deepak SamuelHow to buy DRS evaluation kitDear Stefan,

I have emailed drs4@psi.ch a couple
of times regarding the pricing of the evaluation
  
  747   Fri Mar 8 19:35:11 2019 Abaz KryemadhiROOT Macro for newest softwareThe older root macro did not work for me
for data acquired with the newest software.

so for the newest software and
 read_binary.C 
  746   Wed Mar 6 10:09:01 2019 Willy Changdrscl "no board found" in some Win7 or Win8.X PCsHi all, 

When connecting the board and running
the Zadig program, some Windows PCs may return "driver
  
  745   Mon Feb 25 08:48:27 2019 Stefan Rittno board found"dynamic" or "static"
does not matter, as long as you don't
use your program on another computer. I have
  
  744   Mon Feb 25 08:40:44 2019 Lev Pavlovno board found 

Hello. When compiling drs_exam,
do you need to use a "static "version
  
  743   Thu Feb 21 09:57:53 2019 Stefan Rittno board foundCould be. Have you tried that elog:657

Stefan

  
  742   Thu Feb 21 09:51:24 2019 Lev Pavlovno board foundHey. Yes, the program is running as administrator.
By the way, this is win10. Your drs_exam
works fine. My drs_exam compiled wrote no
  
  740   Wed Feb 20 12:56:56 2019 Stefan Rittmeg?No idea. Maye some access problem. Have
you tried to start your program under an
admin account?
  
  739   Wed Feb 20 12:13:44 2019 Lev Pavlovmeg?Great, drs_exam compiles without problems.
Now when you run the compiled file drs_exam
writes board not found, but drsosc and drscl
  
  738   Wed Feb 20 08:08:42 2019 Stefan Rittmeg?You have to change the path to libusb-1.0.lib
to the one where you installed it.

Stefan
  
  737   Wed Feb 20 08:03:04 2019 Lev Pavlovmeg?Hey. Strange problem. Why does the compiler
refer there at all? Library installed drsosc
works
  
  736   Mon Feb 4 18:18:22 2019 Stefan RittDifferent Distances between the sampling points elog:361

  
  735   Mon Feb 4 17:36:49 2019 Hans SteigerDifferent Distances between the sampling pointsSorry.... but is there a solution or a
Root Macro, that reads the waveforms into
a Root-Tree? I simply can not work anymore
  
  734   Mon Feb 4 16:46:04 2019 Stefan RittDifferent Distances between the sampling pointsThe sampling points are NOT equidestant,
they have varying bin widths of 150ps to
250ps at 5GS/s. That's due the way the
  
  733   Mon Feb 4 16:42:08 2019 Hans SteigerDifferent Distances between the sampling pointsDear All,

with the older software for my
V5 Board i did not have the problem, that
  
  732   Sat Feb 2 10:10:22 2019 Stefan RittSaving Rate (only 15Acq/s)The reduction of rate is because you save
in XML format, which is an ASCII format,
so human readable, but takes long to write.
  
  731   Sat Feb 2 00:13:12 2019 Hans SteigerSaving Rate (only 15Acq/s)Dear All,

 

when I use my Evaluation Board
  
  730   Wed Jan 30 17:08:58 2019 Stefan RittROOT Macro for data acquired with the newest softwareThis one elog:361
should still work.

Stefan
  
  729   Wed Jan 30 08:02:25 2019 Stefan RittDRS4 domino wave stability studyThe Domino wave is most stable at 5 GSPS,
slowly degrades down to 3-2 GSPS, and at
1GSPS gets some significant jitter. This
  
  728   Wed Jan 30 06:51:37 2019 Saurabh NeemaDRS4 domino wave stability studyWe have been using DRS4 IC in our design
for quite some time and it is giving good
performance.
  
  727   Tue Jan 29 14:43:44 2019 Abaz KryemadhiROOT Macro for data acquired with the newest softwareHello,

Is there a root macro for decoding
binary data acquired with the newest software
  
  726   Thu Nov 8 12:02:34 2018 Davide DepaoliTiming IssueThanks a lot for the quick response.
We will do as you suggest.
  
  725   Thu Nov 8 11:54:33 2018 Stefan RittTiming IssueThat's not a bug, but a feature of the DRS4
chip. The time bins have different values
by the properties of the chip. They are generated
  
  724   Thu Nov 8 11:44:35 2018 Davide DepaoliTiming IssueHi,

We are using the DRS4 Evaluation Board as
  
  723   Thu Nov 8 09:57:26 2018 Stefan RittPi attenuator on eval board inputs?The attenuator compensates for the gain
of the buffer which is slightly above one.
In addition, it serves as a "placeholder"
  
  722   Mon Nov 5 17:17:08 2018 Sean QuinnPi attenuator on eval board inputs?Dear DRS4 team,

 

I am curious about this part of
 pi_att.PNG 
  721   Wed Sep 26 19:21:03 2018 Stefan RittTrigger OUT pulse width variable from 100 us up to 100 msIn meantime I even updated the manual.

Stefan

  
  720   Wed Sep 26 18:28:20 2018 Gerard Arino-EstradaTrigger OUT pulse width variable from 100 us up to 100 msThank you very much for the answer, I really
appreciate your help.

Thanks!
  
  Draft   Wed Sep 26 18:25:07 2018 Gerard Arino-EstradaTrigger OUT pulse width variable from 100 us up to 100 msThank you very much for the answer, I
really appreciate your help.

Thanks!
  
  718   Wed Sep 26 14:44:14 2018 Stefan RittTrigger OUT pulse width variable from 100 us up to 100 msThe "Trigger OUT" has changed
recently. It goes high on a new trigger,
but then STAYS high until the board has been
  
  717   Sun Sep 23 02:22:46 2018 Gerard Arino-EstradaTrigger OUT pulse width variable from 100 us up to 100 msHello Stefan,

I am using the DRS4 board connected
to a Raspberry PI and through the drsosc
  
  716   Thu Sep 13 18:09:13 2018 Martin Petriska"Symmetric spikes" fixedOk, so I made it ... and Yes it works :), 

https://youtu.be/0noy4CoFoh8 

here is changed part in drs4_eval4_app.vhd
  
  715   Tue Sep 4 13:04:30 2018 Stefan Ritt"Symmetric spikes" fixedYes it's possible, but I have to find
time for that. The software of the evaluation
board takes care of the spikes ("remove
  
  714   Mon Sep 3 11:17:26 2018 Martin Petriska"Symmetric spikes" fixedHi,

Is it possible to fix it by FPGA
changes?  I see readout cycle (proc_drs_reedout) in
  
  713   Tue Aug 21 14:36:44 2018 Stefan RittOptimal readout speedThe analog output of the DRS4 chip needs
some time to settle. In principle it need
an infinite amout of time (exponential curve)
  
  712   Tue Aug 14 06:10:49 2018 Stefan RittLatch delay supportI put that on the wish list, but I won't
have time for that in the next months.

Stefan
  
  711   Mon Aug 13 19:44:59 2018 Martin PetriskaLatch delay supportHi,

https://forge.physik.rwth-aachen.de/projects/drs4-rwth

Not sure about their licensing,
  
  710   Wed Aug 1 00:49:30 2018 Sean QuinnOptimal readout speedDear DRS4 team,

On page 3 of the data sheet, Table
1. for readout speed a typical value of 10
 eval51_adc_50ns.png 
  709   Fri Jul 20 00:44:13 2018 Woon-Seng ChoongEffect of interpolation on timingJust a follow-up update.

It turns out that I was using a
cubic spline interpolation with smoothing.
  
  708   Mon Jul 16 19:39:35 2018 Woon-Seng ChoongEffect of interpolation on timingUsing a test pulse split into two channels
of the DRS4 Evaluation Board v5, I looked
at the time resolution using a leading edge
  
  707   Fri Jun 29 07:51:33 2018 Stefan RittNegative Bin WidthYes that's normal. A negative cell
bin width means that the next cell N+1 samples
the input signal before cell N. This can
  
  706   Thu Jun 28 19:55:45 2018 Woon-Seng ChoongNegative Bin WidthI am using a DRS4 Evaluation Board v5 and
running the drsosc.exe version 5.06 on
a Window 7 machine. I have performed the
 bin_width_5gsps.jpgtest5gsps.dat 
  705   Tue Jun 19 12:54:51 2018 Phan Van ChuanThe data acquisition speedThank Stefan Ritt, I added the SoftTrigger()
just after StartDomino(), so now, The data
acquisition speed the same speed as in the
  
  704   Tue Jun 19 10:05:50 2018 Stefan RittThe data acquisition speedHow do you tigger the board? In your code
below you start the board (StartDomino())
and then wait for a trigger. Setting the
  
  703   Tue Jun 19 06:42:23 2018 Phan Van ChuanThe data acquisition speedDear Stefan,

We are using an DRS4 board V5.1
for building a metering system for the scintillator
 wavech0.png 
  702   Wed Jun 13 16:34:28 2018 Julian KempMaximum analog input voltageThank you! That solves my problem.




  
  701   Wed Jun 13 13:42:47 2018 Stefan RittMaximum analog input voltageIn principle the numbers in the manual
are correct. But they relate to pulses of
a certain length, because the input protection
  
  700   Wed Jun 13 13:23:17 2018 Julian KempMaximum analog input voltageDear all,

I have been wondering what the
maximum analog input voltage for the DRS4
  
  699   Fri Jun 8 08:11:05 2018 Stefan Ritt Several people reported this problem, but
we cannot reproduce it at our lab. Both the
oscilloscope and the command line interface
  
  698   Thu Jun 7 16:27:21 2018 Phan Van Chuan Dear Stefan,

I am using an DRS4 board to test
the signal from an scintillator detector;
 figure1.pngfigure2.png 
  697   Thu May 17 13:29:34 2018 Stefan Ritt"Symmetric spikes" fixedGood news for all DRS4 users. After many
years, I finally understand where the "symmetric
spikes" come from and how to fix them.
 with.pngScreen_Shot_2018-05-17_at_13.30.23_.pngwithout.png 
  696   Mon May 14 09:21:29 2018 Alessio BertiWIndows Connection problem with drs507 SOLVEDHi,

I have a machine with Windows 10
and the solution provided by Steven works
  
  695   Wed May 9 14:07:10 2018 Alec ShacklefordWIndows Connection problem with drs507 SOLVEDThank you for this fantastic solution.
I had almost reinstalled windows 7 to see
if that would solve the issue!
  
  694   Wed May 9 09:03:52 2018 Stefan RittManual Rev5.1 Figure 1, optional componentsI updated the picture in the manual with
a current picture of a Rev5.1 board, and
also added a picture of the bottom side.
  
  693   Tue May 8 23:58:35 2018 Sean QuinnManual Rev5.1 Figure 1, optional componentsDear All,

 

I'm troubleshooting a board
  
  692   Tue May 8 14:43:03 2018 Stefan RittPeak at 0 mV in tracesThe DRS chip is read out with a 12 bit
ADC, thus the phyical resolution is roughly
1V/4096 = 0.24 mV. I say roughly since the
  
  691   Tue May 8 12:15:54 2018 Alessio BertiPeak at 0 mV in tracesHi Stefan,

following your example, we tried
to perform the same measurement, using drs_exam
 20180508_drs4_drs_exam_1000_events_81_bins_linear.png20180508_drs4_drs_exam_1000_events_81_bins_log.png20180508_drs4_drs_exam_1000_events_23_bins_linear.png20180508_drs4_drs_exam_1000_events_23_bins_log.png 
  690   Sun May 6 11:45:09 2018 Stefan Rittconfusion about the description in drs.cppThe locbus_addr is indeed 32 bits wide,
since the firmware was originally derived
from some firmware running in a VME crate,
  
  689   Sun May 6 08:13:37 2018 chen wenjunconfusion about the description in drs.cppHi Stefan:

  I'm still confused that
althought the 8 bits buffer is enough,the
  
  688   Fri May 4 12:11:57 2018 Stefan RittRunning drs_example.cppAnd here is the second part of your answer:
When you change the input range, you have
to redo the voltage calibration. Best is
  
  687   Fri May 4 11:56:08 2018 Stefan RittVoltage and Timing Calibration in drs_exam.cppHave you set the sampling frequency 

b->SetFrequency(5, true);

before the calibration?
  
  686   Fri May 4 11:35:20 2018 Stefan RittPeak at 0 mV in tracesI tried the following:

- trigger on a 10 MHz sine wave
on CH0, CH1 was open
 Screen_Shot_2018-05-04_at_11.36.24_.png 
  685   Wed May 2 12:23:16 2018 Alessio BertiPeak at 0 mV in tracesHi,

thank you for the quick reply.
All the bins in the previous histograms have
 zero_peak_after_spike_removal_ch2_1000_bins.png 
  684   Wed May 2 12:12:42 2018 Stefan RittPeak at 0 mV in tracesI note that your peak at zero is exactly
twice as high as the bins left and right,
so this looks to me like a binning problem
  
  683   Wed May 2 10:44:17 2018 Alessio BertiPeak at 0 mV in tracesHi,

we modified drs_exam.cpp to read
all 4 channels from the DRS4 and apply directly
 zero_peak_after_spike_removal_ch1.pngzero_peak_after_spike_removal_ch2.pngzero_peak_after_spike_removal_ch3.pngzero_peak_after_spike_removal_ch4.pngzero_peak_after_spike_removal_offset_correction_ch2.png 
  682   Wed May 2 09:24:53 2018 Stefan RittDRS4 using drs_exam.cpp to save as binary filesYou have to write the C/C++ code yourself
to write data in binary or any other format.
All information is present after the waveform
  
  681   Tue May 1 02:00:40 2018 Hyunseong KimDRS4 using drs_exam.cpp to save as binary filesHi, 

I would like to save the waveform
in a .dat binary file using drs_exam.cpp.
  
  680   Tue Apr 17 13:28:23 2018 Stefan RittDRS4 read_binary.cpp On the software download page at https://www.psi.ch/drs/software-download
you find a link to all versions of the DRS
software, which is located at: https://www.dropbox.com/sh/clqo7ekr0ysbrip/AACoWJzrQAbf3WiBJHG89bGGa?dl=0
  
  679   Mon Apr 16 21:21:29 2018 Sobimpe EniolaDRS4 read_binary.cpp Hello everyone, 

The new read_binary.cpp code 

I will be very glad if anyone can
  
  678   Fri Apr 13 18:14:07 2018 Alessio BertiVoltage and Timing Calibration in drs_exam.cppHi,

we were trying to implement an
automatic way to calibrate our DRS4 both
  
  677   Fri Mar 23 09:39:55 2018 Stefan RittRead the CalibrateWaveformYou don't have to read and calibrate
the waveforms in your user code, but can
rely on the DRS.cpp library to do that. Just
  
  676   Thu Mar 22 14:36:01 2018 Phan Van ChuanRead the CalibrateWaveformHelo
I'm building an application for
reading waveforms from the DRS4 board to
  
  675   Mon Mar 19 16:22:42 2018 Stefan RittROI The DRS4 has an internal storage of 1024
capacitors. They work as a ring buffer, so
at 5GSPS you can store 200ns wide signals.
  
  674   Mon Mar 19 15:12:02 2018 Stefan RittRunning drs_example.cppThe time channel is already calibrated
in ns. So for 5 GSPS, the time scale goes
from zero to 200. Concerning your other issues
  
  673   Fri Mar 16 14:00:06 2018 Stefan Rittconfusion about the description in drs.cppThe FPGA is very small, so it only has
an address space of 256 bytes. Look at the
definition in DRS.cpp
  
  672   Thu Mar 15 08:44:26 2018 Stefan Rittsub-ms precision timestamps?Putting sub-ms precision into the header
does not make sense, since the USB transfer
only happens in time-slots of about 2 ms.
  
  671   Wed Mar 14 09:13:39 2018 chen wenjunconfusion about the description in drs.cppHi,Stefan:

  recently,whtn I study the
drs.cpp code ,I found that  the buffer[1]
 20180314161201.jpg 
  668   Wed Mar 14 00:38:15 2018 Will Flanagansub-ms precision timestamps?Dear DRS4 community,

Is there a way to extract timestamps
with sub-ms precision? The milliseconds of
  
  667   Thu Mar 8 22:54:20 2018 Rodrigo Trindade de MenezesRunning drs_example.cppWe found a way to solve the previous problem,
but right now when we try to set the input
range only -0.5 to 0.5 is working. When we
  
  666   Wed Mar 7 22:49:38 2018 Rodrigo Trindade de MenezesRunning drs_example.cppHello,

We have been using the DRS4 evaluation
board (S/N 2636) that works with the scope
 drs_exam.cpp 
  665   Fri Mar 2 21:05:48 2018 Steven BlockROI Great! That is very helpful. 

One more question. If no signals
were detected in the 1024*200ps time frame
  
  664   Fri Mar 2 20:17:17 2018 Stefan RittROI N'/N is correct. The 2 us "from
the response you got from me" come from
the fact that after readout, you have to
  
  663   Fri Mar 2 18:08:55 2018 Steven BlockROI Hello,

I have a question about how ROI
works. From what I have read, it will only
  
  662   Tue Feb 27 18:12:32 2018 Stefan RittDRS4 Dead timesFor applications which are critical on
the dead time, one typically uses one ADC
per DRS4 channel, and thus the dead time
  
  661   Tue Feb 27 18:04:18 2018 Steven BlockDRS4 Dead timesThat is extremely helpful! Many thanks.
One more question; If I were to take inputs
from 2 channels at once, would that scale
  
  660   Tue Feb 27 17:04:12 2018 Stefan RittDRS4 Dead timesXML is very slow to write, and you are
probably limited by that. Switch to binary
mode, which is much faster. You will see
  
  659   Tue Feb 27 16:34:26 2018 Steven BlockDRS4 Dead timesHello All,

I am currently trying to figure
out how to properly characterize the dead
 6x 
  658   Tue Feb 27 13:29:47 2018 Stefan RittWIndows Connection problem with drs507 SOLVEDDear Steven, many thanks for this information,
this is very useful. I know of people having
problems on Windows 10, maybe this will also
  
  657   Tue Feb 27 13:17:00 2018 Steven BlockWIndows Connection problem with drs507 SOLVEDHello All,

I too have been struggling with
trying to get the drs4 (507) to work on my
  
  656   Thu Jan 25 08:07:32 2018 chen wenjunproblem with the drscl(drs507)I have tried about 4 computers,only one
worked fine.I truly want to know how others
get this fixed,can you get in touch with
  
  655   Thu Jan 25 08:00:16 2018 Stefan Rittproblem with the drscl(drs507)This problem has been reported by several
people, like elog:551

So far I could not solve it. On
  
  654   Thu Jan 25 06:10:52 2018 chen wenjundrscl doesn't find eval board but drsosc does (Windows 7)Hi! Jim:

  It seems that I meet the
same question with you ,and I am confused
  
  653   Thu Jan 25 05:24:05 2018 chen wenjunproblem with the drscl(drs507)Hi! Stefan:

  when I change a new computer(win7,64bit),I
meet a problem that the drscl app cannot
  
  652   Wed Jan 17 10:09:09 2018 Stefan RittThe input signals recorded are different with the signal showed in oscilloscope First thing is to do another voltage calibration.
Disconnect input, "Config", "Execute
Voltage Calibration". If this does not
  
  651   Wed Jan 17 09:51:16 2018 Tran Cong ThienThe input signals recorded are different with the signal showed in oscilloscope Dear Stefan,

I am using an DRS4 board to record
the signals from an plastic scintillator
  
  650   Wed Dec 20 22:14:35 2017 Stefan Rittcascading -- DRS4 Osci.cpp & DRS.cpphttps://bitbucket.org/ritt/drs4eb

 
  
  649   Wed Dec 20 16:30:45 2017 Yoni Shercascading -- DRS4 Osci.cpp & DRS.cppHi, 

The board is modified (and checks
out with the DRSScope program). Could you
  
  648   Wed Dec 20 16:21:42 2017 Stefan Rittcascading -- DRS4 Osci.cpp & DRS.cppFirst you need a board which is modified
in hardware to support channel cascading.
Basically there are internal resistors which
  
  647   Wed Dec 20 15:30:38 2017 Yoni Shercascading -- DRS4 Osci.cpp & DRS.cppHi, 

I'm trying to do the same thing
(get 1 channel with 8192 bins), but I'm
  
  646   Tue Dec 12 13:58:06 2017 Stefan RittExternal trigger using Raspberry PiIndeed the code does not work for the current
evaluation board, it has been written for
a previous version and never been updated.
  
  645   Tue Dec 12 00:25:50 2017 Diego YankelevichExternal trigger using Raspberry PiDear Steffan:


We have been able to use the
DRS4 using a Raspberry Pi but we have not
  
  644   Wed Nov 22 14:52:31 2017 Stefan RittAveraging capabilities This feature is not yet implemented. The
(disabled) software swtich is more like a
kind of a reminder to myself to work on that
  
  643   Wed Nov 22 09:19:11 2017 chen wenjun using of the DRS Command Line InterfaceThank you very much !! All my fault for
I thought it too comlicated. Thank you sincerely!

  
  642   Wed Nov 22 09:14:18 2017 Stefan Rittusing of the DRS Command Line InterfaceRemove the check mark from the "Lock"
box and enter a different value in the sampling
speed box and hit return.
  
  641   Wed Nov 22 08:58:33 2017 chen wenjun using of the DRS Command Line InterfaceOK!Thank you! One more question,when I
use the Oscillocope ,I found that the actual
speed is a constant value of 1.007G,how can
 ΢ͼƬ_20171122160245.png 
  640   Wed Nov 22 08:48:36 2017 Stefan Rittusing of the DRS Command Line InterfaceThe command line interface is more a debugging
tool for experts, and you are not supposed
to use it except to test the connection to
  
  639   Wed Nov 22 08:31:03 2017 chen wenjun using of the DRS Command Line InterfaceHello! I'm using DRS4 evaluation board
V5 with the drs command line interface,but
the mannal only explained the meaning of
 ΢ͼƬ_20171122153834.png 
  638   Thu Nov 16 02:55:44 2017 Diego YankelevichAveraging capabilities The Display window in the Oscilloscope
software shows averaging capabilites but
I have not been able to activate these. Is
  
  637   Fri Nov 3 13:28:04 2017 Stefan RittTriggering using ANDThink about: How would you make a coincidence
(AND) between two edges? Since an edge is
infinitesimally small, there is no way to
  
  636   Fri Nov 3 12:11:14 2017 Hkan WennlfTriggering using ANDHi!

I'm using the DRSOsc program,
and I have a question that I need a bit clarified;
  
  635   Wed Oct 18 11:48:14 2017 Vadym DenysenkoTime offset Thank you for your reply!




  
  634   Wed Oct 18 09:12:26 2017 Stefan RittTime offset No this is not possible. But you can delay
your signal externally (like with a delay
cable or electronically) and then send the
  
  633   Tue Oct 17 14:58:58 2017 Vadym DenysenkoTime offset Hello.

 

I have a simple question, can I
  
  632   Mon Oct 16 15:35:22 2017 Stefan RittRaspberry Pi Connection FailureHave you tried as root? Maybe you miss
some permissions.

Stefan
  
  631   Fri Oct 13 03:39:01 2017 Jonathan WapmanRaspberry Pi Connection FailureI am currently attempting to use a raspberry
pi to connect to the DRS 4 board. I whenever
I try to use the DRS Command Line TOol, Revision
  
  630   Mon Oct 2 16:08:05 2017 Stefan RittEvent acquisition pace for irregular timingAs written in the documentation, the DRS
evaluaiton board has a maximum trigger capability
of ~500 Hz. This is limited by the USB bus
  
  629   Wed Sep 27 16:11:03 2017 Yoni SherEvent acquisition pace for irregular timingHi, 

I'm running a LIDAR application
that requires that every outgoing pulse be
  
  628   Sun Aug 27 12:44:16 2017 Yuvaraj ElangovanDRS4 version SupportHi i am using DRS4 Eval Board V2, How to
acquire data to a bin file using it.  
 
  
  627   Tue Jul 25 14:47:05 2017 Volodymyr RodinTime outputHi again.

Okay, it works with 5.05 version very
good and it is enough for me.
  
  626   Fri Jul 21 09:16:02 2017 Volodymyr RodinTime outputHello Stefan

I tried to convert binary to a
simple txt file and found next problem -
  
  625   Thu Jul 20 13:00:44 2017 Volodymyr RodinDriver installation on Windows 10Dear Laura

You need to disable driver signature
enforcement.  Then try again with path
  
  624   Wed Jul 12 20:16:05 2017 Stefan RittTime resolution between boardsYes this should  be possible.

Stefan

  
  623   Wed Jul 12 04:24:39 2017 Toshihiro NonakaTime resolution between boardsHello,

I 'm using four evaluation
boards v.3 to construct the multi-board DAQ
  
  622   Fri Jul 7 10:31:47 2017 Stefan RittTrigger setting (AND AND) OR (AND AND)Unfortunately not with the current firmware.

Stefan

  
  621   Thu Jul 6 15:10:48 2017 Esperienza GioveTrigger setting (AND AND) OR (AND AND)Hello there,

is it possible to setup trigger
in double AND configuration (a pair in and
  
  620   Thu Jun 22 21:36:08 2017 Stefan RittAND Trigger problems with 2-3 channelsHi,

from our screenshots I see the
following:
  
  619   Fri Jun 16 17:34:20 2017 Laura GonellaDriver installation on Windows 10Hello,

I am trying to get a DRS4 board
to run on Windows 10. I am having problems
  
  618   Fri Jun 9 09:44:33 2017 Rebecca SchmitzAND Trigger problems with 2-3 channelsHello,

It
seems that a coincidence with two fixed channels
 Screenshot1.pngScreenshot2.pngScreenshot3.png 
  617   Thu Jun 8 15:52:20 2017 Stefan RittAND Trigger problems with 2-3 channelsCan you post a screenshot where I can see
the channel waveforms, the configuration
and the trigger settings?
  
  616   Thu Jun 8 14:26:23 2017 Rebecca SchmitzAND Trigger problems with 2-3 channelsHello,

I work with the DRS4 Evaluation
Board V5 and I have a problem with the software.
  
  615   Tue May 30 21:22:10 2017 Esperienza GioveSetting input rangeThank you




  
  614   Tue May 30 21:00:26 2017 Stefan RittSetting input rangeSee elog:531




  
  613   Tue May 30 20:45:30 2017 Esperienza GioveSetting input rangeHello,

is it possible to set a completely
negative input range like -1 to 0 or -0.95
  
  612   Fri May 26 08:48:25 2017 Stefan RittInvalid magic number 0000There is no other way to reset the board.
As I said, people running this under Windows
or MacOS are fine, so maybe this calls for
  
  611   Thu May 25 20:20:57 2017 Esperienza GioveInvalid magic number 0000Hello, thanks for your answer. Unluckily
if i try to reset in this way it keeps hanging


musb_write: requested
  
  610   Thu May 25 20:17:41 2017 Esperienza GioveInvalid magic number 0000Hello, thanks for your answer. Unluckily
if i try to reset in this way it keeps hanging


musb_write: requested
  
  609   Tue May 23 10:24:47 2017 Stefan RittInvalid magic number 0000Under linux, many people observed that
the USB connection is unstable to the evaluation
board. This must be related to the linux
  
  608   Mon May 22 18:27:56 2017 Esperienza GioveInvalid magic number 0000Hello everybody!

After some times i init my board,
or if i stop the program during the acquisition,
  
  607   Thu Apr 20 06:30:13 2017 Strahinja LukicWave rotation during transfer from the board?Thanks.

Strahinja

  
  606   Wed Apr 19 12:17:25 2017 Stefan RittWave rotation during transfer from the board?This is correct. Actually the amplitude
array is rotated already inside the DRS4
chip. So the readout starts with the stop
  
  605   Sat Apr 15 03:48:31 2017 Strahinja LukicWave rotation during transfer from the board?I don't know if this question is already
documented elsewhere.

I am developing a DAQ code for
  
  604   Thu Apr 13 17:10:58 2017 Christian FarinaStand-alone Time Calibration for PSI BoardThank you for your help Stefan. I will
try to get the TC part isolated.

  
  603   Thu Apr 13 17:02:01 2017 Stefan RittStand-alone Time Calibration for PSI BoardThan you can try to isolate the code. Note
that different SCAs might work differently.
Like the DRS4 has a channel-to-channel jitter
  
  602   Thu Apr 13 16:54:32 2017 Christian FarinaStand-alone Time Calibration for PSI BoardHi Stefan,

Thank you for your reply. I have
read the paper already. I looked through
  
  601   Thu Apr 13 16:50:18 2017 Stefan RittStand-alone Time Calibration for PSI BoardHard to say. Timing calibration is quite
delicate. If you start from scratch, better
read this paper: https://arxiv.org/abs/1405.4975
  
  600   Thu Apr 13 16:42:21 2017 Christian FarinaStand-alone Time Calibration for PSI BoardHello everybody,

I was trying to create a stand-alone
program that would perform a time calibration
  
  599   Tue Apr 11 09:41:44 2017 Stefan Rittdrs4 registers behaviourWhat I do is the following: Have the RESET
input unconnected. When you power up, this
makes an internal reset during the power
  
  598   Tue Apr 11 09:07:33 2017 Giovanni Brunidrs4 registers behaviourThank you Stefan for replying!
I have still the RESET issue in mind:
how would you suggest to reset properly the
  
  597   Mon Apr 10 14:05:17 2017 Stefan Rittdrs4 registers behaviour1. WRITE SHIFT register and CONFIG registers
are initialized to "1" on power
up, but if you want to change that, use A0-A3
  
  596   Mon Apr 10 13:41:41 2017 Giovanni Brunidrs4 registers behaviourHej Stefan! Thank you for your answer!

Just to be sure to have understood
properly:
  
  595   Mon Apr 10 10:50:57 2017 Stefan Rittdrs4 registers behaviourUsing the RESET line to reset registers
is not a good idea since it can have some
bad side-effects. The READ SHIFT register
  
  594   Mon Apr 10 10:48:03 2017 Stefan RittDRS4 eval board v4 coincidence firmware changes for triger for short pulsesYou have to download the package for your
board, which then includes also the correct
firmware for your board. If you have a V4
  
  593   Mon Apr 10 08:50:11 2017 Giovanni Brunidrs4 registers behaviourHej everyone!
I have some questions regarding what
happens to some DRS registers in some scenarios:
  
  592   Wed Apr 5 12:40:16 2017 Martin PetriskaDRS4 eval board v4 coincidence firmware changes for triger for short pulsesI would like to implement fpga firmware
changes for DRS4 eval board v4 to put there
posibility for standard coincidence (for
  
  591   Wed Apr 5 12:28:28 2017 Stefan Rittdrscl doesn't find eval board but drsosc does (Windows 7)Two people report now this problem, while
this works fine at our lab. So I'm puzzled
right now.
 Screen_Shot_2017-04-05_at_12.27.46_.pngScreen_Shot_2017-04-05_at_11.45.07_.png 
  590   Tue Mar 28 21:53:12 2017 Jim Freemandrscl doesn't find eval board but drsosc does (Windows 7)I cannot find the EVAL board using drscl
version 5.06 while the drsosc works fine.
I tried 2 different eval boards and 2 different
  
  589   Fri Feb 24 18:35:38 2017 Stefan RittPassing parameters to drsclThis is indeed currently not implemented.
But there is a simple C program drs_exam.cpp,
which connects to a board and safes some
  
  588   Fri Feb 24 17:34:28 2017 Tarik ZenginPassing parameters to drsclHi everyone,

I wonder if there is a way to pass
parameters to drscl. What I specifically
  
  587   Tue Jan 31 08:40:04 2017 Stefan RittLLD and ULD discriminations,Not inside the board. Each channel has
a single discriminator. You can select to
trigger on a rising or falling edge, but
  
  586   Tue Jan 31 01:37:35 2017 VO HONG HAILLD and ULD discriminations,Dear Stefan,
 Is there any way to develop
LLD and ULD discrimination in DSR-4 evaluation
board?
 Best regards,
V.H.Hai
  
  585   Mon Jan 30 16:37:33 2017 Stefan RittAND trigger problems In the evaluation board we use an ADCMP601
comparator, which has a setup and hold time
of 4.6 ns. So a pulse which exceeds the threshold
  
  584   Sat Jan 28 14:11:58 2017 Danny PetschkeAND trigger problems  Dear Stefan,

I have 2 identical pulses as a
splittet signal with an amplitude of 300mV.
  
  583   Fri Jan 13 13:50:10 2017 Stefan RittDRS software doesn't work under Windows XP SP3Can you try that executable under XP: https://www.dropbox.com/s/j1n09afhbmh0zzu/drsosc.exe?dl=0




  
  582   Fri Jan 13 13:16:09 2017 Stefan RittDRS software doesn't work under Windows XP SP3The error probably comes from the fact
that the drsosc.exe application is a 64-bit
application and cannot be executed under
  
  581   Fri Jan 13 12:58:22 2017 Gregor KrambergerDRS software doesn't work under Windows XP SP3Hi all

I have a problem with running the
DRSOSC under windows XP SP3. We have some
  
  580   Fri Dec 9 04:17:46 2016 Abhishek RajputPotential Incorrect Timing Calibration for DRS4 DataHello Stefan,

Many thanks for the explanations.
You've cleared my confusion in this matter.
  
  579   Fri Dec 2 16:47:37 2016 Stefan RittDRS4 InitiationNo, I can't think of anything else.
There is no intermediate addressing stage.
The only thing which sometimes happens is
  
  578   Fri Dec 2 15:32:52 2016 samridha kunwarDRS4 InitiationThanks for replying Stefan.

I was more so just concerned with
the steps in the firmware when I had asked.
  
  577   Wed Nov 30 19:05:24 2016 Stefan RittDRS4 InitiationUhh, there are 1000 things which might
be wrong. A bit like "my car is not
working, it makes strange noise". Without
  
  576   Wed Nov 30 17:48:39 2016 samridha kunwarDRS4 InitiationI am having a general problem getting read
back using the ROI mode.  In the transparent
mode everything looks good. These are the
  
  575   Wed Nov 30 10:45:29 2016 Stefan RittLong timing between two channelsYou cannot measure times longer than 1024/sampling
rate.

Stefan
  
  574   Wed Nov 30 08:53:58 2016 Stefan RittPotential Incorrect Timing Calibration for DRS4 DataThe inverter chain in the DRS4 is continously
running in a ring. Once you get a trigger,
it is stopped. This happens in any of the
  
  573   Tue Nov 29 23:19:06 2016 Abhishek RajputPotential Incorrect Timing Calibration for DRS4 DataHello Stefan,

Thank you for the excellent explanation
and diagram. This part of the code is now
  
  572   Mon Nov 28 22:28:34 2016 Randall GladenLong timing between two channelsI don't believe I fully understand
how the timing works between multiple channels
on DRS4 board, even after reading the manual,
  
  571   Mon Nov 28 16:52:38 2016 Stefan RittPLL did not lockHave you tried to unplug and re-plug the
board a few times? According to our database,
you should have three boards. Do all three
  
  570   Mon Nov 28 16:48:15 2016 Alexey LubinetsPLL did not lockThe serial number is 2586. This board is
about two years old, and it might be in use
(but I do not know exactly).
  
  569   Thu Nov 24 13:24:26 2016 Stefan RittPotential Incorrect Timing Calibration for DRS4 DataThe code in the macro is correct. The misconception
lies in the definition what "sample
0" means. Please view the attached picture.
 drs.pdf 
  568   Thu Nov 24 08:13:23 2016 Stefan RittPLL did not lockWhich serial number has the board? Has
it been in use before or is it a new board?

Stefan
  
  567   Thu Nov 24 00:40:38 2016 Alexey LubinetsPLL did not lockHello, everybody!

I installed DRSosc and DRScl. Command
line works normally (at least, it can "see"
  
  566   Wed Nov 23 08:17:23 2016 Abhishek RajputPotential Incorrect Timing Calibration for DRS4 DataHello,

I was running through a particular
binary file containing data taken on all
  
  565   Mon Nov 21 14:13:32 2016 Stefan RittChannel offsets in GetTime()Cell 700 is arbitrary. You can choose any
cell to align the channels to each other.
The only requirement is that it's always
  
  564   Fri Nov 18 16:38:42 2016 Gerard MontarouLabViewHello,

Did you start to write some VI
to interface DRS4board with labview ?
  
  563   Fri Nov 18 05:52:45 2016 Kurtis NishimuraChannel offsets in GetTime()Hello,

I have a question about the GetTime()
method in DRS.cpp.  I understand how
 offsetInstructions.png 
  562   Thu Nov 10 22:07:40 2016 Stefan RittBreak Statements in DRS4 Binary to ROOT MacroYou're right, fread() return the number
of objects read, so indeed it should be one
if successful.
  
  561   Thu Nov 10 20:54:45 2016 Christian FarinaMissing HeaderHi Stefan,

I have already read the paper.
I was just unsure where the calibration code
  
  560   Thu Nov 10 19:24:52 2016 Abhishek RajputBreak Statements in DRS4 Binary to ROOT MacroHello,

I am wondering why the code should
be changed to i < sizeof(eh), since doesn't
  
  558   Thu Nov 10 09:56:04 2016 Stefan RittBreak Statements in DRS4 Binary to ROOT MacroHi,

fread() returns the number of bytes
read and zero (I believe) if there is an
  
  557   Thu Nov 10 04:41:24 2016 Abhishek RajputBreak Statements in DRS4 Binary to ROOT MacroHello,

I recently modified the binary
to ROOT convertor written by Stefan (https://midas.psi.ch/elogs/DRS4+Forum/361)
  
  556   Wed Nov 9 19:49:07 2016 Stefan RittMissing HeaderBest is to read this paper: https://arxiv.org/abs/1405.4975

The source code for that is in
DRS.cpp in the DRS software distribution
  
  555   Wed Nov 9 17:19:48 2016 Christian FarinaMissing HeaderThank you Stefan, that was just what I
needed.

Also, I have another question,
  
  554   Tue Nov 8 10:20:52 2016 Stefan RittMissing HeaderThe web page from where you downloaded
the software contains a sentence "requires
libusb-1.0 package". Please install
  
  553   Fri Nov 4 17:41:03 2016 Christian FarinaMissing HeaderHello everybody,

I am completely new to this, so
please bear with me.
  
  552   Fri Oct 28 15:51:59 2016 Stefan RittProblems with DRS command lineNo, I absolutely have no idea. Both DRSOsc
and drscl use exaclty the same code to access
USB.
  
  551   Fri Oct 28 15:02:18 2016 Simon MendischProblems with DRS command line[quote="Stefan Ritt"]
You are the first one describing this problem
(out of ~200 people), so I guess the problem
  
  550   Thu Oct 27 08:29:26 2016 Stefan RittProblems with DRS command line[quote="Alexey Lubinets"]Hello, everybody

I have installed the software for the DRS4
  
  549   Wed Oct 26 21:15:35 2016 Alexey LubinetsProblems with DRS command lineHello, everybody

I have installed the software for the DRS4
  
  548   Tue Oct 11 22:11:26 2016 Stefan Ritttime difference between 2 channels only ~30-35ps @ 5GSmples/sThank you very much! I will check it tomorrow!

-d

Concerning the offset, it looks
  
  547   Tue Oct 11 09:20:04 2016 Stefan Ritttime difference between 2 channels only ~30-35ps @ 5GSmples/sConcerning the offset, it looks to me like
you moved the offset slider slider of channel
1 to a non-zero position. You see that from
  
  546   Tue Oct 11 09:04:33 2016 Danny Petschketime difference between 2 channels only ~30-35ps @ 5GSmples/sHello Stefan,

thanks for the paper. That makes
sense. I thought about sth. like that but
  
  545   Mon Oct 10 12:03:27 2016 Stefan Ritttime difference between 2 channels only ~30-35ps @ 5GSmples/sOk, I got it. The timing resolution is
affected by the signal-to-noise ratio over
the rise-time of your signal. You find the
 Screen_Shot_2016-10-10_at_12.01.03_.pngScreen_Shot_2016-10-10_at_12.01.57_.pngScreen_Shot_2016-10-10_at_12.36.48_.png 
  544   Mon Oct 10 11:30:37 2016 Danny Petschketime difference between 2 channels only ~30-35ps @ 5GSmples/sHello Stefan,

Chn2 & Chn3 were used for delay-determination as
you can see on the second picture.
 allChannels_zero_scaled.pngChn2_Chn3_1ns_delay_scaled.png 
  543   Sun Oct 9 11:39:18 2016 Stefan Ritttime difference between 2 channels only ~30-35ps @ 5GSmples/sCan you post a screenshot of your measurement?

Stefan

  
  542   Sun Oct 9 10:43:35 2016 Danny Petschketime difference between 2 channels only ~30-35ps @ 5GSmples/s(Board Type:9, DRS4)

Hello,

I´m trying to reach the timig
  
  541   Thu Oct 6 15:23:18 2016 Will Flanagan Hi Stefan,

That is exactly what I'm looking
for. Thanks again!
  
  540   Thu Oct 6 11:18:05 2016 Stefan RittTimestamp for each DRS4 waveformIn the mentioned read_binary.cpp file you
have the line where you read the event header

i = fread(&eh, sizeof(eh),
  
  539   Wed Oct 5 22:43:29 2016 Will FlanaganTimestamp for each DRS4 waveformHi DRS4 Experts,

I have been analyzing DRS4 binary
data with scripts based on Stefan's (very
  
  538   Fri Sep 30 17:03:38 2016 Stefan RittOutput Timing DriftingHi Jacob,

you are missing the timing calibration.
Each sampling cell has not the same width.
  
  537   Thu Sep 29 17:26:13 2016 Jacob HwangOutput Timing DriftingHello,

I have designed four DRS4 chips
(36 channels) on my board running at 1GHz
 Output_Drifting.jpg 
  536   Mon Aug 29 12:51:48 2016 Stefan Rittincrement write config register on the fly?The problem is when you change the write
config register from 11111111 to 01111111,
or from 00001111 to 00000111, then the last
  
  535   Mon Aug 29 12:18:49 2016 benjamin legeytincrement write config register on the fly?If I may trouble you for a little more
information, the critical point then is
that there should not be any zeroes in the
  
  534   Mon Aug 29 10:57:33 2016 Stefan Rittincrement write config register on the fly?The issue with "stopping at cell 767"
would also affect this mode of operation.
Furthermore, the DRS4 chip has only 10 bit
  
  533   Mon Aug 29 09:36:34 2016 benjamin legeytincrement write config register on the fly?Hello,

I have a question about using the
write config register to enable/disable sampling
  
  531   Wed Jun 29 09:10:01 2016 Stefan RittNegative input signalsHello everybody,

I get often asked if the DRS4 evaluation
board can accomodate negative input pulses
  
  530   Wed Jun 15 14:49:00 2016 Stefan Rittproblems of DRS41. Simultaneous writing and reading is
not possible with the DRS4 chip. The manual
says differently on p. 14, but due to a bug
  
  Draft   Sun Jun 12 08:49:54 2016 Michaelproblems of DRS4Hi

I want to use DRS4 to
digitize 16 channels of signals. The width
  
  528   Sun Jun 12 08:45:52 2016 Michaelproblems of DRS4Hi

I want to use DRS4 to
digitize 16 channels of signals. The width
  
  527   Wed Jun 1 23:16:01 2016 Stefan Rittproblems when stop cell >= 767 ??I cannot confirm the story with the "stop
capacitor > 767". It can be seen
from your plots that the distribution of
  
  526   Wed Jun 1 22:29:01 2016 Dominik Neiseproblems when stop cell >= 767 ??Hello Stefan,

some colleages told me a story,
I was neither able to confirm nor find anything
 stop_cell_distribution.png 
  525   Thu May 12 12:38:17 2016 Stefan RittDRS4 Macro to save eventsDear Maksat,

If your car does not run, and you
call the car dealer and tell him "my
  
  524   Thu May 12 08:16:41 2016 Stefan RittProblem For Software DownloadCan you tell me (screendump) what is the
problem on the web site https://www.psi.ch/drs/software-download ?
It should redirect you to
  
  523   Thu May 12 05:18:47 2016 YuProblem For Software DownloadHi

 I can't download the
software for windows on this website 'www.psi.ch/drs/software-download',
  
  522   Wed May 11 15:48:57 2016 SANDJONG Saturnin OrlyProblme de Calibration de la DRS4Bonjour, Je suis en stage dans un laboratoire
ou on utilise pour echantillonnage des données,
une cartes DRS4 5GSPS avec 1024 cell, mon
 piedestaux_per_time.jpg 
  521   Wed May 11 04:01:14 2016 MaksatDRS4 Macro to save eventsDear Stefan,

I am trying to setup DRS inside
radiation enclosure and would like to write
  
  520   Mon May 2 14:31:28 2016 Dmitry Hitstwo DRS4 boards configuration with 2048 samples eachHi Stefan

Any chance you have time to fix
the software for multiboard configuration
  
  519   Thu Apr 28 15:47:53 2016 Stefan RittNew software version and binary formatA new software version 5.0.5 has been released
today. This fixes a few bugs in multi-board
configurations, and adds saving of the scaler
  
  518   Thu Apr 28 15:46:34 2016 Stefan RittBest settings for time measurementsThe DRS4 chip has been designed to work
best at high sampling speeds. At 700 MSPS,
the chip is at it's limit and timing
  
  517   Wed Apr 27 20:04:12 2016 Abaz KryemadhiBest settings for time measurementsI am studing some pulses that are about
200-300 ns wide and a rise time of few ns,   
which settings would be best for coincidence
  
  516   Wed Apr 27 09:51:37 2016 Toshihiro Nonakaserial number problem The serial number has been fixed by
using drscl. Thank you!

  
  515   Wed Apr 27 09:04:01 2016 Stefan Rittserial number problem If dis- and reconnecting the board does
not help, there is the (small) chance that
the serial number got erased in the board.
  
  514   Wed Apr 27 08:14:14 2016 Toshihiro Nonakaserial number problem Dear all,

I'm using 3 DRS boards simultaneously
and their serial numbers are 2169, 2170,
 serial.png 
  513   Tue Apr 26 13:42:42 2016 Stefan RittDRS4 purchase informationJust be patient. Anita is not at work this
week.

  
  512   Tue Apr 26 09:54:16 2016 Stefan RittNegative fCellDT values from GetTimeCalibration()I just realized that the negative bin widht
is not explicitly mentioned in the quoted
paper. So let me explain it here:
  
  511   Sat Apr 23 12:33:17 2016 Daniel Stricker-ShaverNegative fCellDT values from GetTimeCalibration()Hi Kyle,

If I remember right the negative
sampling width happens only for 498 and at
  
  509   Thu Apr 21 22:16:43 2016 Kyle WeinfurtherNegative fCellDT values from GetTimeCalibration()Hello Stefan,

I am using four DRS4 v5 eval boards
to digitize 16 channels of data. I have recently
 ch5.pngch7.pngch9.png 
  508   Fri Apr 15 12:58:46 2016 Konstantin GusevDRS4 purchase information    Hi,

 I can't contact with
Anita Van Loon about DSR4 chip's price
  
  507   Wed Apr 6 09:46:10 2016 Daniel DribinDRS Oscilloscope freezing after a long run


Martin Petriska
  
  506   Wed Apr 6 09:43:52 2016 Daniel DribinDRS Oscilloscope freezing after a long run At hight rates I worked with files of up
to 20 GB so I don't think this is the
problem.
  
  505   Wed Apr 6 09:01:28 2016 Martin PetriskaDRS Oscilloscope freezing after a long run  




  
  504   Wed Apr 6 08:41:08 2016 Stefan RittDRS Oscilloscope freezing after a long run Even with writing for one night no problem
(see below). Have you checked how big your
data file is? I guess there is a limit under
 Screen_Shot_2016-04-06_at_8.40.35_.png 
  503   Tue Apr 5 16:08:59 2016 Stefan RittDRS Oscilloscope freezing after a long run I tried this night to run the board at
a 10 Hz rate with an external pulser, without
writing, and it did not freeze after ~14
  
  502   Mon Apr 4 12:08:15 2016 Stefan RittDRS Oscilloscope freezing after a long run Then it seems that there is some USB communication
problem. I heard this also from other people,
that the USB data transfer under Windows
  
  501   Mon Apr 4 11:41:26 2016 Daniel DribinDRS Oscilloscope freezing after a long run Dear Stefan Ritt,

Yes I use Windows 7, If the DRS
Oscilloscope program stays
  
  500   Mon Apr 4 11:31:34 2016 Stefan RittDRS Oscilloscope freezing after a long run Dear Daniel,

sorry my late reply, I'm pretty
busy these days. The behavior you report
  
  499   Sun Apr 3 22:34:28 2016 Abaz KryemadhiTrigger on the And of a positive and negative signalThanks, great!




  
  498   Sun Apr 3 22:10:19 2016 Chris ThompsonTrigger on the And of a positive and negative signalNo there are no other components. I put
a photo of the inverter with its cables SMA
and one end, BNC at the other. You can see
 Pulse_inverter.jpg 
  497   Sat Apr 2 17:22:34 2016 Abaz KryemadhiTrigger on the And of a positive and negative signalThanks again,   this is very
useful,  just another question did you
put any other passive elements in the circuit
  
  496   Sat Apr 2 11:41:07 2016 Stefan RittQuestion about timimng calibrationThe evaluation board normally has 1024
bins per channel. We offer an option with
2048 bins using channel cascading, to capture
  
  495   Sat Apr 2 11:21:10 2016 Felix BachmairQuestion about timimng calibrationHi,

I am trying to understand some
details about the timing calibration.
  
  494   Fri Apr 1 22:09:07 2016 Chris ThompsonTrigger on the And of a positive and negative signalThe coilcraft part number is: JA4220-ALB.
Iordered two of them and they were sent as
free samples. You might want to buy some
  
  493   Fri Apr 1 01:30:40 2016 Abaz KryemadhiTrigger on the And of a positive and negative signalHi Chris,

 I am looking at Sensl SiPMs
as well,  can you send the part number
  
  492   Thu Mar 31 20:48:00 2016 Chris ThompsonTrigger on the And of a positive and negative signalI needed a fast pulse inverter in order
to feed signals from the recent SensL SiPMs
into a conventional CFD which only accepted
  
  491   Thu Mar 31 20:38:05 2016 Abaz KryemadhiTrigger on the And of a positive and negative signalThanks, that looks just fine.




  
  490   Thu Mar 31 20:34:25 2016 Stefan RittTrigger on the And of a positive and negative signalHere is one (SI 100): https://www.picoquant.com/products/category/accessories/adapters-splitters-cables-various-accessories-for-photon-counting-setups




  
  489   Thu Mar 31 19:44:38 2016 Abaz KryemadhiTrigger on the And of a positive and negative signalOk, thanks!  do you know an easy in-line
inverter like mini-circuit or digikey?   
Can also redesign the detector I gues to
  
  488   Thu Mar 31 19:35:06 2016 Stefan RittTrigger on the And of a positive and negative signalNo. You have to use an inverter for one
of your signals.

Stefan
  
  487   Thu Mar 31 19:30:26 2016 Abaz KryemadhiTrigger on the And of a positive and negative signalI would like to be able to trigger in this
fashon:  channel 0 > 0.1 and. channel
1< -0.1,  because I have a positive
  
  486   Tue Mar 22 12:54:41 2016 Stefan Ritt Yes this is correct. But it is a sample-and-hold
circuit. So the sampling cell follows the
input for 3.2 ns, then samples and holds
  
  485   Mon Mar 21 10:38:27 2016 Daniel DribinDRS Oscilloscope freezing after a long run Dear Stefan Ritt,

I am using a DRS4 v5 to do timing
measurements of Positron lifetime. I use
 drs_settings.pngempty_drs.pngdrs_ofset.png 
  484   Fri Mar 11 19:50:18 2016 Dominik Neise Hello Stefan,

I just stumbled again over a phrase
in the DRS4 datasheet I never really understood,
  
  483   Wed Mar 9 09:57:20 2016 Christian DLabViewHi,

I would like to use the DRS4 board
with LabView for fast readout.
  
  482   Mon Feb 29 14:09:21 2016 Stefan Ritttwo DRS4 boards configuration with 2048 samples eachThe multi-board mode has never been tested with
2048 samples, so is very likely not to work.
I don't know yet how much work this will
  
  481   Mon Feb 29 13:33:06 2016 Dmitry Hitstwo DRS4 boards configuration with 2048 samples eachDear Stefan,

I daisy-chained two boards (master
sn#: 2514 - slave sn#: 2513) each with 2048
  
  480   Mon Feb 29 13:09:29 2016 Stefan Rittbaseline shiftThe baseline shift comes from some instable
power supply inside the evaluation board
which cannot be controlled to the mV level.
  
  479   Mon Feb 29 12:58:17 2016 Dmitry Philippovbaseline shiftHello! My name is Dmitry. I am from SiPM
Lab is NRNU MEPhI (Russia, Moscow). We bought
DRS4 evaluation board V5 with firmware 21305.
 pic1.pngpic2.pngpic3.png 
  478   Tue Feb 16 11:55:54 2016 Martin PetriskaSaving histogram data 




  
  477   Tue Feb 16 11:21:43 2016 Stefan RittSaving histogram dataThere is no histogram save functoinality
in ther DRSOscilloscope program - on purpose.
The board and the software are meant to evaluate
  
  476   Fri Jan 15 08:09:00 2016 Stefan RittTriggering of DRS4 in the fastest sampling modeHi Chris,

if you ever used an oscilloscope,
you might be familar with the button controlling
 edge.png 
  475   Thu Jan 14 21:49:37 2016 Chris ThompsonTriggering of DRS4 in the fastest sampling modeI am attempting to use the DRS4 to measure
the timing resolution of a pair of SensL
silicon photomultipliers (SiPM). In order
 OR_mode_selected.jpgAND_mode_selected.jpg20ns_per_div.jpg 
  474   Thu Jan 14 14:11:06 2016 Stefan RittDtap stops toggling after 40msecThanks for the update, I will add a note
into the data sheet.

  
  473   Thu Jan 14 14:00:26 2016 mony orbachDtap stops toggling after 40msecsurrey i forgot to update..

after carefully examining our VHDL
we found out that there are brief times that
  
  472   Tue Jan 12 21:02:31 2016 Stefan RittCompiling DRS-examI guess you are compiling under MS Windows
??? You probably don't link correctly
to the USB lib. Try to compile the examples
  
  471   Tue Jan 12 17:57:03 2016 Jack BargemannCompiling DRS-examI am trying to compile drs-exam, but am
getting an error message I do not understand:


1>musbstd.obj
  
  470   Tue Jan 12 16:06:07 2016 Stefan RittUse of Channel Cascading in drs_exam.cppHi Larry,

sorry my late reply, swamped with
work here. You were right in the modifictions
  
  469   Tue Jan 12 15:42:31 2016 Larry ByarsUse of Channel Cascading in drs_exam.cppAn update. I have been successful in making
modifications to drs_exam.cpp so that I can
get 2048 samples per channel.. The main changes
  
  468   Tue Jan 12 12:57:46 2016 Stefan RittPC software beyond Windows 7The 5.0.4 version was corrupt on our server.
I fixed it, so now it shoudl also work fine
(although there are only very minor changes
  
  467   Wed Jan 6 15:51:58 2016 Larry ByarsUse of Channel Cascading in drs_exam.cppHello Stefan,

Here in Rockford, TN we just got
a new DRS4 evaluation board (Serail # 2612,
  
  466   Wed Dec 30 17:00:00 2015 Stefan RittDtap stops toggling after 40msecWhile I can understand 1., I'm puzzeled
by 2.

If you put the chip in standby
  
  465   Wed Dec 30 16:25:35 2015 mony orbachDtap stops toggling after 40msecHi

  
  464   Mon Dec 28 11:21:54 2015 mony orbachDtap stops toggling after 40msecHi Stefan

Thanks for your input.

We are in the process of assemble
  
  463   Mon Dec 28 11:05:15 2015 Stefan RittDtap stops toggling after 40msecThanks for posting the plots. It really
looks like the PLL is not working. I see
two possible reasons: 1) The PLLEN bit in
  
  462   Sun Dec 27 15:41:32 2015 mony orbachDtap stops toggling after 40msecHi

We have some measures to show (attached)


Dtap and Denable
Dtap+Denable
 Dtap-Denable.gifdtap-Danable2.gifDtap-refck.gifDtap-Dspeed.gif 
  Draft   Sun Dec 27 15:06:59 2015 mony orbachDtap stops toggling after 40msecHi

We have some meesurs to show (attached)


Dtap and Denable
Dtap+Denable
  
  460   Thu Dec 24 12:45:41 2015 Stefan RittDtap stops toggling after 40msecI want to see the trace on the scope for
the DTAP, the REFCLK, the DENABLE and the
DWRITE.
  
  459   Thu Dec 24 10:51:31 2015 mony orbachDtap stops toggling after 40msecmy refclk is 1.25Mhz

what are the inputs and voltage
you need to see?
  
  458   Wed Dec 23 15:48:42 2015 Stefan RittDtap stops toggling after 40msecNo idea what you do wrong. I need to see
oscilloscope traces for all your inputs and
voltages. What is your REFCLK input?
  
  457   Wed Dec 23 15:38:14 2015 mony orbachDtap stops toggling after 40msecHi

the drs4 start to generate Dtap
signal after reset and standard configuration.
  
  456   Sat Dec 5 03:21:21 2015 Chris ThompsonPC software beyond Windows 7On a hunch, I tried downloading V 5.0.3
instead. This works, and I now have the oscilloscope
mode displaying signals! (just to make sure,
  
  455   Sat Dec 5 02:39:20 2015 Chris ThompsonPC software beyond Windows 7I tried restarting Windows 10 in a way
the allowed me to use "advanced startup
options" Option 7 suggested it was to
  
  454   Thu Nov 26 18:59:27 2015 Robert AdamsSaving histogram dataI would really love to be able to save
histogram data, though I have not been able
to do this. I could take a screenshot and
  
  453   Wed Nov 25 17:36:25 2015 Chris ThompsonPC software beyond Windows 7I tried this suggestion of changing the
startup settings to ingore driver license
signing (as suggested in the post # 434),
 Installation_failure_screen.jpg 
  452   Wed Nov 25 08:20:47 2015 Stefan RittPC software beyond Windows 7Have a look here elog:434




  
  451   Wed Nov 25 02:52:35 2015 Chris ThompsonPC software beyond Windows 7I am new to this forum. I have ordered
a DRS4 evaluation board for doing experiments
with very fast PET detectors. It has not
  
  450   Thu Nov 5 00:18:42 2015 Will FlanaganLatest macro for DRS4 V5Hi Stefan,

This is absolutely perfect.

Thanks,
  
  449   Wed Nov 4 15:40:10 2015 Stefan RittLatest macro for DRS4 V5Have a look here: elog:361

 

  
  448   Tue Nov 3 23:15:38 2015 Will FlanaganLatest macro for DRS4 V5I should of course mention that I looked
through the DRS4 website and didn't see
anything obvious: https://www.psi.ch/drs/evaluation-board
  
  447   Tue Nov 3 22:37:56 2015 Will FlanaganLatest macro for DRS4 V5Hi DRS4 Experts,

I have an extremely naive question:
Is there any official macro to unpack the
  
  Draft   Wed Oct 7 13:06:34 2015 Ilja BekmanVoltage Calibration with signal on the input    
  445   Wed Aug 19 15:07:53 2015 Martin PetriskaQtPALSThere is software for DRS4 board and positron
lifetime measurement availiable. Still in
beta but works. Its usable for measuring
  
  444   Fri Aug 7 20:32:15 2015 Felix BachmairDRS4Hi

Did you copy the udev rule 41-drs.rules
into /etc/udev/rules.d/ ?
  
  443   Fri Aug 7 18:41:37 2015 danteDRS4Hi

I have just installed DRS4, but
when I try to view it from the USB it don't
  
  442   Thu Jul 23 13:46:12 2015 Stefan RittMeasure the time between different samples> Hi,
>   I have a question using a data acquisition
card base on DRS4 chip. How can I measure
  
  441   Mon Jul 20 09:25:38 2015 Chenfei YangMeasure the time between different samplesHi,
  I have a question using a data acquisition
card base on DRS4 chip. How can I measure
  
  440   Tue Jul 7 09:29:21 2015 Felix BachmairCreation of Object filesYes of course no problem.

You can download via github https://github.com/veloxid/DRS4-v5-shared and
 Makefile 
  439   Mon Jul 6 19:25:27 2015 Stefan RittCreation of Object filesAnyhow it would be nice if you just post
your Makefile here, which runs with the standard
distribution, so people can use it if needed.
  
  438   Mon Jul 6 11:30:56 2015 Felix BachmairCreation of Object filesHi Stefan,

That's fine for me. I thought
it might be interesting for others as well..
  
  437   Fri Jul 3 17:13:27 2015 Stefan RittCreation of Object filesHi Felix,

the distribution does not contain
any binaries, since there are too many Linux
  
  436   Thu Jul 2 13:20:51 2015 Felix BachmairCreation of Object filesHI,

We are using the DRS4 Board in
the EUDAQ framework [1]. We wrote a a Producer
  
  435   Thu Jul 2 08:53:17 2015 Felix BachmairIssue with Trigger rates below ~100HzHi,

We did a further investigation
of this problem:
  
  434   Fri Jun 19 12:32:10 2015 Gregor Krambergerdrs 5.03 and windows 8.1 

  
  433   Thu Jun 18 17:33:05 2015 Gregor Krambergerdrs 5.03 and windows 8.1I have problems with driver installation
on windows 8.1 (software version 5.03).
I have sen that that has been an issue before
  
  432   Tue Jun 16 22:26:41 2015 Stefan RittDRS4 Evaluation Board Osc ApplicationThere is a horizontal position slider in
the "Horizontal" box on the right
side below the trigger delay. Use it.
  
  431   Tue Jun 16 20:45:54 2015 Michael BuadelkDRS4 Evaluation Board Osc ApplicationHi, I have a DRS4 v5 evaluation board and
I have a novice question about the oscilliscop
application. When I connect it to a photo-detector
  
  430   Fri Jun 5 13:32:03 2015 Stefan RittDRS4 firmware UCF constraints Actually we should take this offline not to
pester other DRS users which are not interested
in this topic. Please call me directly (3728)
  
  429   Fri Jun 5 13:29:55 2015 Stefan RittDRS4 firmware UCF constraints Do the following: 

Use the TRG OUT of the evaluation board as
  
  428   Fri Jun 5 13:15:35 2015 Felix BachmairDRS4 firmware UCF constraints Hi Stefan,
No we only use one evaluation board. We use
the evaluation board as a part of our beam
  
  427   Fri Jun 5 12:07:38 2015 Stefan RittDRS4 firmware UCF constraints I presume you have several evaluation boards
and want to run them in sync, right?
  
  426   Wed Jun 3 09:07:38 2015 Stefan RittPeculiar behavior of time values for Rev5 DRS4 EBFirst of all, you should not use new boards
with old software. I try to keep the current
software compatible with old boards, but
  
  425   Tue May 26 11:27:27 2015 Felix BachmairDRS4 firmware UCF constraints > > Hello, I'm using two DRS4 rev.5 boards
for 8ch readout and triggering.
> > 
  
  424   Sun May 24 09:34:27 2015 Peter SteinbergPeculiar behavior of time values for Rev5 DRS4 EBHi -

I am setting up a new DRS4 rev5
but using drivers and software we were recently
  
  423   Sat May 23 11:03:20 2015 Felix BachmairIssue with Trigger rates below ~100HzHi

We are working with the DRS 4 V5
version and we investigated an issue with
 drs_v5_newStefan_10Hz.pngdrs_v5_newStefan_4Hz.pngdrs_v5_500_160Hz.pngdrs_5-0-0_4hz.png 
  422   Fri May 22 14:25:45 2015 Stefan RittDRS4 firmware UCF constraints > Hello, I'm using two DRS4 rev.5 boards for
8ch readout and triggering.
 firmware.zip 
  421   Tue May 19 14:14:45 2015 Ilja BekmanDRS4 firmware UCF constraints Hello, I'm using two DRS4 rev.5 boards for
8ch readout and triggering.
  
  420   Wed May 13 16:25:24 2015 Stefan Ritttransparent-mode voltageTo get the good linearity, you need indeed
ROFS = 1.05V. With a O-OFS of 0.9V, a zero
input signal would give you DRS_OUT+=1.05V
  
  419   Wed May 13 16:13:07 2015 Chenfei Yangtransparent-mode voltageIf using a ROFS of 0.9V, the input would
not between 1.05V~2.05V better non-linearity
area. Is that appropriate?
  
  418   Wed May 13 12:52:22 2015 Chenfei Yangtransparent-mode voltageYes. I use exactly the same scheme as you
mentioned. I'll try your solution.

  
  417   Wed May 13 12:34:49 2015 Stefan Ritttransparent-mode voltageThere might be a solution. How do you bias
th input of the
DRS4 chip? If you use a scheme as described
  
  416   Wed May 13 10:27:43 2015 Chenfei Yangtransparent-mode voltageI'm using an AD9252, 0.9V common mode
voltage is suggested and I already use 8
un-switchable level shifters. Just as you
  
  415   Wed May 13 10:16:40 2015 Stefan Ritttransparent-mode voltageI see your point. Actually I will soon
have the same issue since we design right
now a board with an AD9637 using the transparent
  
  414   Wed May 13 09:55:09 2015 Chenfei Yangtransparent-mode voltageHere's the problem. My external ADC
has 2Vpp differtial input voltage range.
And the common-mode voltage of the inputs
  
  413   Wed May 13 09:45:51 2015 Stefan Ritttransparent-mode voltageThe ROFS signal has no effect in the transparent
mode, so you have to adjust O_OFS between
sampling and transparent mode accordingly.
  
  412   Wed May 13 09:31:18 2015 Chenfei Yangtransparent-mode voltageHello Mr. Stefan Ritt

  For DRS4 differential inputs
ranges form 500mV to 1100mV, with ROFS set
 tek00000_.png 
  411   Wed May 13 08:19:53 2015 Stefan RittGetting Trigger SourceDRSBoard::GetTriggerSource() simply returns
what has been enabled via DRSBoard::SetTriggerSource().
The actual source which causes the trigger
  
  410   Wed May 13 01:07:36 2015 Cosmin DeaconuDRS4 Evaluation Board + Powered USB HubI am trying to use 4 evaluation boards
with a powered USB hub (since eventually,
I will have to do this on a laptop). 
  
  409   Wed May 13 00:52:51 2015 Cosmin DeaconuGetting Trigger SourceI'd like to be able to know which channel
(0,1,2,3 or external) was responsible for
the trigger.  DRSBoard::GetTriggerSource()
  
  408   Tue Apr 21 13:06:39 2015 Stefan RittDRS4 Evaluation Board Baseline/Voltage Calibration Sure, for a V3 board you need a pre-V5
software, but I assumed Julien had a V5 board. 

  
  407   Tue Apr 21 13:03:38 2015 Daniel Stricker-ShaverDRS4 Evaluation Board Baseline/Voltage Calibration I also use Ubuntu 14.04 LTS and for my
V3 borad I have to use drsosc 4.x or ealier
to perform the calibration.
  
  406   Tue Apr 21 12:52:18 2015 Stefan RittDRS4 Evaluation Board Baseline/Voltage Calibration 1) I tried to cablirate a V5 board with
drsosc 5.0.3 and it just worked fine for
me. No idea what went wrong in your case.
  
  405   Tue Apr 21 12:01:45 2015 Stefan Ritt DRSBoard::SetTriggerSourceYour first assumption is correct, e.g.

source = 00000000'00000001
= 0x0001 ==> CH1
  
  404   Mon Apr 20 13:08:24 2015 Stefan RittClock settings in daisy chain DAQThe resolution coming from the sampling
rate goes into these numbers, but just marginally.
At 5 GSPS, you get a few ps reolution, while
  
  403   Fri Apr 17 10:07:38 2015 Simon WeingartenClock settings in daisy chain DAQHi Stefan,

do you know how these numbers (400ps
and 60ps) scale with the sampling rate? The
  
  402   Thu Apr 9 11:46:33 2015 Felix Bachmair DRSBoard::SetTriggerSourceHi

I have a question about the function
SetTriggerSource in the class DRSBoard (DRS.h/DRS.cpp)
  
  401   Sun Apr 5 22:16:48 2015 Julien WulfDRS4 Evaluation Board Baseline/Voltage Calibration Hi,

I`m trying to calibrate my DRS4
evoluation board to an input range of 0-1V
  
  400   Thu Mar 19 07:37:52 2015 Daniel Stricker-ShaverRunning 2 instances of a DRS DAQ programI don't know if it helps, but we measured
the time resolution between two independendly
running v3 boards using a single PC (latest
  
  399   Tue Mar 17 02:53:26 2015 Stefan RittRunning 2 instances of a DRS DAQ programI never had in mind running two systems
in parallel, that's why the code claims
all interfaces when started. You have to
  
  398   Mon Mar 16 16:07:39 2015 Hermann-Josef MathesRunning 2 instances of a DRS DAQ programHi,

we want to run two instances of
our little DRS DAQ program but obviously
  
  397   Fri Feb 13 10:12:16 2015 Andrzej Grzeszczukdrs4 and rootHello,

I compiled base file for drs system 
(DRS.cpp) to root framework (root.cern.ch)
  
  396   Fri Jan 16 14:12:19 2015 Stefan RittMac OSX Yosemite 10.10> Hello,

> I can compile version 5.0.3 of DRS4sc on
  
  395   Fri Jan 16 13:29:05 2015 Rainer HentgesMac OSX Yosemite 10.10Hello,

I can compile version 5.0.3 of DRS4sc on
  
  394   Tue Nov 25 14:06:34 2014 Stefan RittRaspberry Pi drsosc does not exit properly

    

       
            
  
  393   Mon Nov 17 16:36:18 2014 Mickey ChiuRaspberry Pi drsosc does not exit properlyWhen running drsosc on a raspberry pi,
it seems the exit doesn't seem to work at
all.  This is true for the "exit"
  
  392   Sun Oct 19 14:36:54 2014 Chris Tullycoverting the xml file format into binary Hi,
    Is there a straightforward
way to convert the xml file format into the
  
  391   Thu Oct 16 16:16:12 2014 Stefan Rittbinary files time calibration header in drs-5.0.2> Dear Stefan

> I have a problem considering binary data
  
  390   Thu Oct 16 16:15:16 2014 Stefan Rittbinary files with more than 4 drs board ver. 5.0.2> Dear Stefan

> after having some problems with writing
  
  389   Wed Oct 15 12:15:58 2014 Stefan RittClock settings in daisy chain DAQHere is the full version
of the program with clock daisy-chaining.
Before switching to the external clock, it
 drs_exam_multi.cpp 
  388   Wed Oct 15 11:34:43 2014 Simon WeingartenClock settings in daisy chain DAQ

    

       
            
  
  387   Wed Oct 15 10:52:58 2014 Stefan RittClock settings in daisy chain DAQ

    

       
            
  
  386   Wed Oct 15 10:14:32 2014 Simon WeingartenClock settings in daisy chain DAQHi,
I'm currently working on a little
DAQ system with four DRS evaluation boards.
  
  385   Tue Oct 14 16:51:37 2014 Stephane DebieuxUSB Microcontroller firmware

    

       
            
  
  384   Tue Oct 14 16:38:14 2014 Stefan RittUSB Microcontroller firmware

    

       
            
  
  383   Tue Oct 14 16:34:45 2014 Stephane DebieuxUSB Microcontroller firmware

    

       
            
  
  382   Tue Oct 14 16:29:12 2014 Stefan RittUSB Microcontroller firmware

    

       
            
  
  381   Tue Oct 14 16:21:07 2014 Stephane DebieuxUSB Microcontroller firmware

    

       
            
  
  380   Mon Oct 13 17:14:58 2014 Stefan RittUSB Microcontroller firmware

    

       
            
  
  379   Mon Oct 13 17:08:40 2014 Stephane DebieuxUSB Microcontroller firmware

    

       
            
  
  378   Mon Oct 13 16:46:56 2014 Stefan RittUSB Microcontroller firmware

    

       
            
  
  377   Tue Oct 7 14:09:02 2014 Stephane DebieuxUSB Microcontroller firmwareHi,
I'm trying to recompile the USB microcontroller
firmware starting from the drs_eval.c file
  
  376   Mon Sep 22 15:04:37 2014 Stefan RittTiming Calibration Fail

    

       
            
  
  375   Mon Sep 22 14:52:21 2014 Stefan Rittcompilation error for v5.0.2

    

       
            
  
  374   Mon Sep 15 16:24:41 2014 Hannes WachterTiming Calibration FailHi,
has anyone experienced a shutdown
of the DRSosc.exe or DRScl.exe when executing
  
  373   Fri Sep 12 16:38:24 2014 Dmitry Hitscompilation error for v5.0.2

    

       
            
  
  372   Fri Sep 12 16:08:49 2014 Stefan Rittcompilation error for v5.0.2

    

       
            
  
  371   Fri Sep 12 14:57:22 2014 Dmitry Hitscompilation error for v5.0.2 Hi,
I am getting the following compilation
error when trying to compile version 5.0.2
  
  370   Fri Sep 12 13:41:43 2014 Stefan Rittsynchronizing two DRS4 evaluation boards readout with one computer

    

       
            
  
  369   Fri Sep 12 13:37:42 2014 Dmitry Hitssynchronizing two DRS4 evaluation boards readout with one computer

    

       
            
  
  368   Fri Sep 12 13:00:04 2014 Stefan Rittsynchronizing two DRS4 evaluation boards readout with one computer

    

       
            
  
  367   Fri Sep 12 11:52:21 2014 Dmitry Hitssynchronizing two DRS4 evaluation boards readout with one computer Hi everyone,
Has anyone tried to synchronize 2
(two) DRS4 evaluation boards readout by the
  
  366   Tue Aug 26 14:16:26 2014 Roman Gredigbinary files with more than 4 drs board ver. 5.0.2Dear Stefan

after having some problems with writing binary
  
  365   Tue Aug 26 12:32:21 2014 Stefan Ritt10GSps on DRS4 Evm with delay cables

    

       
            
  
  364   Thu Aug 21 11:03:36 2014 Martin Petriska10GSps on DRS4 Evm with delay cables Hi, I read its possible to use channels
2,4,6 to extend 200ns to 400ns (1024bins
to 2048).
  
  363   Wed Aug 13 20:17:19 2014 Roman Gredigbinary files time calibration header in drs-5.0.2Dear Stefan

I have a problem considering binary data
  
  362   Wed Jul 30 17:05:38 2014 Stefan Rittdrsosc binary to cern ROOT file conversion

    

       
            
  
  361   Wed Jul 30 17:05:06 2014 Stefan RittROOT program to decode binary data from DRSOsc

    

       
            
 read_binary.Cread_binary.cpp 
  360   Wed Jul 30 11:38:58 2014 Tsutomu NagayoshiSampling speed of DRS4 Board ver4 Hello!
I have a question concerning the
sampling speed of the DRS4 evaluation board.
  
  359   Wed Jul 16 12:10:19 2014 Stefan Rittchange cascading from 1024 to 2048 bins for each input channel

    

       
            
  
  358   Mon Jul 14 19:03:05 2014 Yves Biangachange cascading from 1024 to 2048 bins for each input channelHello,
 
I want to ask
whether it is possible to modify a Evaluation
  
  357   Fri Jun 27 11:23:19 2014 ChengMing Dudrsosc binary to cern ROOT file conversion

    

       
            
  
  356   Mon Jun 16 15:35:59 2014 Osip LishilinAnnouncement of new Evaluation Board V5

    

       
            
  
  355   Thu Jun 12 17:16:13 2014 Stefan RittCalibrationWaveform

    

       
            
  
  354   Thu Jun 12 12:46:00 2014 Stefan RittDRS eval bord v5 Timing> a) Calibration:
> I am using 4 boards daisy chained. To achieve
optimal time resolution I did first a voltage
  
  353   Thu Jun 12 12:40:03 2014 Roman GredigDRS eval bord v5 TimingDear Stefan

I have two questions concerning the best
 eqn1.png 
  352   Wed Jun 11 11:13:50 2014 Stefan RittAnnouncement of new Evaluation Board V5

    

       
            
  
  351   Mon Jun 9 12:03:26 2014 Osip LishilinAnnouncement of new Evaluation Board V5

    

       
            
  
  350   Thu May 29 04:22:43 2014 Toshihiro NonakaCalibrationWaveformI'm writing the drs_exam.cpp to use multi-boards(v3,
firmware:4.0.0), and taking data succeeded.
But I have several questions about function
 offset.png 
  349   Tue May 27 16:07:17 2014 Stefan RittSpikes in DRS4 data on custom baord.

    

       
            
  
  348   Tue May 27 13:46:18 2014 Dominik NeiseSpikes in DRS4 data on custom baord.We see quite some spikes in our DRS4 sampled
data in FACT.  We see different types
of spikes:
  
  347   Mon May 19 08:04:57 2014 Stefan Rittsimultaneous writing and reading with region of interest mode?

    

       
            
  
  346   Fri May 16 14:04:47 2014 Benjamin LeGeytsimultaneous writing and reading with region of interest mode?Hello!
We're developing electronics based
on the DRS4 to read out a breast PET scanner
  
  345   Tue May 13 23:08:50 2014 Stefan Rittdrsosc binary to cern ROOT file conversion

    

       
            
  
  344   Tue May 13 22:03:47 2014 Luka Pavelicdrsosc binary to cern ROOT file conversionThank you for your fast and very helpful
replay.
  
  343   Tue May 13 19:39:36 2014 Stefan Rittdrsosc binary to cern ROOT file conversion

    

       
            
  
  342   Tue May 13 19:34:58 2014 Luka Pavelicdrsosc binary to cern ROOT file conversionHi,

Does anybody have program for conversion
  
  341   Thu Apr 24 23:03:25 2014 Carlo Stelladrs_exam project fail to compile

    

       
            
  
  340   Thu Apr 17 12:02:28 2014 Wang The first channel is wrong. Hi,  QQ??20140417174309.jpg 
  339   Wed Apr 16 10:24:55 2014 Stefan RittDRS4 Evalboard V5 with Windows7Pro64bit
> Dear Stefan
  
  338   Wed Apr 16 08:30:32 2014 Stefan Rittwhy is the first channel output error?

    

       
            
  
  337   Wed Apr 16 08:20:36 2014 Stefan Rittdrs_exam project fail to compile

    

       
            
  
  336   Wed Apr 16 03:22:43 2014 Wang why is the first channel output error?  Hi,
 QQ??20140416090124.jpg 
  335   Tue Apr 15 18:35:41 2014 Carlo Stelladrs_exam project fail to compileHi,
when I try to compile drs_exam project
my computer give me this output:
  
  334   Thu Apr 10 14:45:12 2014 Roman GredigDRS4 Evalboard V5 with Windows7Pro64bit
Dear Stefan
  
  333   Thu Mar 6 11:12:44 2014 Stefan RittSoftware drs-5.0.0 fails to compile (drsosc)

    

       
            
  
  332   Wed Mar 5 21:54:13 2014 Hermann-Josef MathesSoftware drs-5.0.0 fails to compile (drsosc)Hi,
the latest software drs-5.0.0.tar.gz
fails to compile on my freshly installed
 drs-5.patch 
  331   Tue Feb 18 14:12:37 2014 Stefan RittAnnouncement of new Evaluation Board V5

    

       
            
 scope.png 
  330   Wed Feb 5 13:41:42 2014 Stefan RittRepeated time calibration

    

       
            
  
  329   Wed Jan 15 17:37:21 2014 Stefan RittDRS4 installation on Windows 8 issues

    

       
            
  
  328   Wed Jan 15 17:34:55 2014 Stefan RittDRS4 v2.0 Eval Board running on higher versions of DRS Oscilloscope program

    

       
            
  
  327   Wed Jan 15 17:11:14 2014 Stefan RittSome bug fixes and questions

    

       
            
  
  326   Wed Jan 15 17:02:58 2014 Stefan RittSome bug fixes and questions

    

       
            
  
  325   Wed Jan 15 16:15:00 2014 Stefan RittSome bug fixes and questions

    

       
            
  
  324   Wed Jan 15 15:48:55 2014 Stefan RittUSB connection stopsHi,

finally I found some time to look into this
  
  323   Wed Jan 15 14:20:51 2014 Stefan RittAnnouncement of new Evaluation Board V5Dear DRS community,
starting from this year, we ship
the new evaluation board V5. This board has
 drsosc.png 
  322   Thu Jan 9 11:02:46 2014 Stefan Rittv5 software with v4 board calibration

    

       
            
  
  321   Thu Jan 9 10:58:19 2014 Martin Petriskav5 software with v4 board calibration Hi
Question:
In v4 board, which channel has best
  
  320   Tue Dec 17 08:45:32 2013 Stefan Rittsynchronisation of readouts of two boards for offline analysis

    

       
            
  
  319   Mon Dec 16 11:09:25 2013 Dmitry Hitssynchronisation of readouts of two boards for offline analysis

    

       
            
  
  318   Fri Dec 13 11:37:58 2013 Stefan Rittinput protection in DRS4 evaluation board

    

       
            
  
  317   Fri Dec 13 10:37:18 2013 Dmitry Hitsinput protection in DRS4 evaluation board Dear Stefan
Last month I was using a DRS4 evaluation
board to digitise the signal from the charged
  
  316   Tue Dec 10 14:54:46 2013 Stefan Rittmeasurement range

    

       
            
  
  315   Tue Dec 10 14:48:42 2013 ismail okan atakisimeasurement rangeI m trying to measure lifetime in our lab
and I intend to take 
measurement with DRS4 at that point
  
  314   Tue Nov 26 15:38:13 2013 Stefan Rittreducing sampling speed

    

       
            
  
  313   Tue Nov 26 15:36:39 2013 Dmitry Hitsreducing sampling speedDear Stefan
Is there an easy way to reduce sampling
speed below 0.7 GSPS? I would like to record
  
  312   Thu Nov 21 14:45:56 2013 Stefan RittCascading of channels

    

       
            
  
  311   Thu Nov 21 14:35:57 2013 SchabloCascading of channels

    

       
            
  
  310   Wed Nov 20 08:16:10 2013 Stefan RittDRSOsc at Mac OS X Mavericks

    

       
            
  
  309   Tue Nov 19 21:49:37 2013 Andriy ZatserklyaniyDRSOsc at Mac OS X Mavericks

    

       
            
  
  308   Tue Nov 19 09:09:01 2013 Stefan RittDRSOsc at Mac OS X Mavericks

    

       
            
  
  307   Tue Nov 19 04:33:22 2013 Andriy ZatserklyaniyDRSOsc at Mac OS X Mavericks I installed Mac OS package on macbook
(late 2013). DRSOsc starts to write file
but freezes; need to be restarted to restore
  
  306   Mon Nov 18 16:00:26 2013 Stefan Rittsynchronisation of readouts of two boards for offline analysis

    

       
            
  
  305   Mon Nov 18 15:49:01 2013 Dmitry Hitssynchronisation of readouts of two boards for offline analysis Dear Stefan,
I am trying to synchronise the readout
of two test boards, one is the DRS4 test
  
  304   Mon Nov 18 11:20:15 2013 Dmitry Hitsflickering screen for drsosc

    

       
            
  
  303   Thu Nov 14 12:51:56 2013 Stefan RittCascading of channels

    

       
            
 2048_mode.pdf 
  302   Thu Nov 14 11:39:06 2013 SchabloCascading of channels  Hello,  I want use cascading
of channels for 2048 cell - SetChannelConfig(0,8,4),
but i can't understand how . Please, help
  
  301   Wed Nov 6 16:35:42 2013 Stefan Ritt 

    

       
            
  
  300   Wed Nov 6 12:25:31 2013 Stefan Rittflickering screen for drsosc

    

       
            
  
  299   Wed Nov 6 11:53:28 2013 Dmitry Hitsflickering screen for drsoscHi,
 
I have install drs software on ASUS
  
  298   Mon Oct 21 14:43:21 2013 Stephane DebieuxDRS4 analog outputs - interfacing DRS4 to AD9222 ADCHi,
I wish to interface the DRS4 with
the 8-channel ADC AD9222 (or AD9637).
  
  297   Wed Sep 25 14:42:00 2013 Akira OkumuraUSB connection stopsHello Andrey,

Thank you for your advise. But we never terminated
  
  296   Mon Sep 23 09:51:48 2013 Andrzej RychterSampling Frequency: DRS4 eval board

    

       
            
  
  295   Mon Sep 23 09:26:56 2013 Stefan RittSampling Frequency: DRS4 eval board

    

       
            
  
  294   Mon Sep 23 09:22:52 2013 Andrzej RychterSampling Frequency: DRS4 eval boardIs it possible to set sampling frequency
at 100 MHz in DRS4 eval board? Trying to
set 0.1GHz in Osci program results in around
  
  293   Wed Sep 11 02:41:28 2013 Andrey KuznetsovUSB connection stopsHi,

although I don't have a chance to test your
  
  292   Tue Sep 10 10:31:30 2013 Akira OkumuraUSB connection stopsHello the DRS4 team,

I and some of my colleagues are using DRS4
 drs_simple.cpp 
  291   Mon Sep 9 06:49:36 2013 Andrey KuznetsovSome bug fixes and questionsThe DRSCallback *pcb is
missing an if statement in the code when
DRS Oscilloscope software isn't used when
  
  290   Thu Sep 5 10:01:00 2013 Andrey KuznetsovSome bug fixes and questions#11 0x080589de in DRSBoard::GetWave (this=0xb7456008,
chipIndex=0, channel=0 '\000', waveform=0x40f24000,
responseCalib=true, triggerCell=207, wsr=0,
  
  289   Wed Aug 28 13:07:51 2013 Andrey KuznetsovSome bug fixes and questions  For http://www.psi.ch/drs/DocumentationEN/manual_rev20.pdf:
0 0x02 15..8 board_type 5 for DRS4
USB Evaluation Board 1.1 ---> should instead
  
  288   Wed Aug 28 04:05:48 2013 lengchongyang 

    

       
            
  
  287   Tue Aug 27 16:14:49 2013 lengchongyang   Hello everyone!I'm a
new user of DRS4 board,but it seems that
  
  286   Mon Aug 12 22:18:39 2013 Stefan Rittadd an average ability to the Scope

    

       
            
  
  285   Mon Aug 12 15:08:17 2013 tmiron alonadd an average ability to the Scope

    

       
            
  
  284   Wed Aug 7 15:20:33 2013 Hermann-Josef MathesRepeated time calibration

    

       
            
  
  283   Wed Aug 7 15:10:57 2013 Stefan RittRepeated time calibration

    

       
            
  
  282   Wed Aug 7 15:05:59 2013 Hermann-Josef MathesRepeated time calibrationHi,
 
is there any (obvious) reason why
  
  281   Mon Jul 29 06:04:45 2013 Stefan Rittadd an average ability to the Scope

    

       
            
  
  280   Sun Jul 28 09:52:25 2013 tmiron alonadd an average ability to the Scope

    

       
            
  
  279   Thu Jul 25 01:31:29 2013 Andrey KuznetsovEvaluation Board Behavior

    

       
            
  
  278   Tue Jul 23 22:42:31 2013 alonziEvaluation Board Behavior

    

       
            
  
  277   Tue Jul 23 22:35:08 2013 Stefan RittEvaluation Board Behavior

    

       
            
  
  276   Tue Jul 23 22:31:08 2013 alonziEvaluation Board BehaviorWorking with the DRS evaluation board we
noticed some funny behavior: See attatchment
1. In about 1% of scope traces we see the
 Screenshot.pngdata_problem.png 
  275   Tue Jul 16 16:25:43 2013 Stefan Rittadd an average ability to the Scope

    

       
            
  
  274   Tue Jul 16 10:02:28 2013 tmiron alonadd an average ability to the Scope

    

       
            
  
  273   Tue Jul 9 14:00:49 2013 Dmitry Hitscannot save in binary format

    

       
            
  
  272   Tue Jul 9 12:23:06 2013 Stefan Rittcannot save in binary format

    

       
            
  
  271   Tue Jul 9 11:40:00 2013 Dmitry Hitscannot save in binary formatHi,
I would like to save the waveform
in a binary format. When I click Save then
  
  270   Sat Jul 6 06:10:38 2013 Stefan RittMissing methods in drs-4.0.1.tar.gz

    

       
            
  
  269   Fri Jul 5 12:46:45 2013 Hermann-Josef MathesMissing methods in drs-4.0.1.tar.gzHi,
while trying to create python bindings
for the DRS stuff using SWIG 2.0.4, two undefined
  
  268   Thu Jul 4 10:14:32 2013 Stefan Rittadd an average ability to the Scope

    

       
            
  
  267   Thu Jul 4 10:01:06 2013 tmiron alonadd an average ability to the Scope

    

       
            
  
  266   Thu Jul 4 09:17:31 2013 Stefan Rittadd an average ability to the Scope

    

       
            
  
  265   Thu Jul 4 09:07:24 2013 tmiron alonadd an average ability to the Scope

    

       
            
  
  264   Thu Jul 4 08:54:25 2013 Stefan Rittadd an average ability to the Scope

    

       
            
  
  263   Thu Jul 4 08:32:11 2013 tmiron alonadd an average ability to the Scope

    

       
            
  
  262   Tue Jun 18 14:19:39 2013 Stefan RittROOT program to decode binary data from DRSOscPlease find attached a simple ROOT based
program (http://root.cern.ch) to decode binary
data from the DRSOsc program. It assumes
 decode.Cc1.gif 
  261   Mon Jun 10 16:24:21 2013 Stefan Rittadd an average ability to the Scope

    

       
            
  
  260   Mon Jun 10 14:09:13 2013 tmiron alonadd an average ability to the Scope

    

       
            
  
  259   Fri Jun 7 11:44:17 2013 tmiron alonthank you
  
  258   Fri Jun 7 10:22:48 2013 Stefan Ritt 

    

       
            
  
  257   Sun May 26 13:08:52 2013 tmiron alon Hallo,
I'm using DRS4 Evaluation Board Rev
4.0 and I'm trying to  change the output
  
  256   Sat May 25 21:03:22 2013 Stefan RittDRS4- analog pulse counting

    

       
            
  
  255   Sat May 25 12:45:46 2013 Enrico Contimac osx 10.6> > I made some progress. Understood what
was wrong in the make phase. You have only
to add the option -arch i386 in the CFLAGS
  
  254   Fri May 24 18:20:14 2013 Stefan Rittmac osx 10.6> I made some progress. Understood what was
wrong in the make phase. You have only to
add the option -arch i386 in the CFLAGS line
  
  253   Fri May 24 17:58:07 2013 Enrico Contimac osx 10.6> > > 
> > > it looks like 64bit vs 32bit problem,
you have to compile all libraries for the
  
  252   Tue May 21 18:30:11 2013 Enrico Contimac osx 10.6> > > 
> > > it looks like 64bit vs 32bit problem,
you have to compile all libraries for the
  
  251   Tue May 21 17:51:09 2013 Stefan Rittmac osx 10.6> > 
> > it looks like 64bit vs 32bit problem,
you have to compile all libraries for the
  
  250   Tue May 21 17:48:45 2013 Enrico Contimac osx 10.6
> it looks like 64bit vs 32bit problem, you
have to compile all libraries for the same
  
  249   Tue May 21 17:45:05 2013 Enrico Contimac osx 10.6
> Can it be that you have a old PowerPC MAC?
I have no experience with that, but probably
  
  248   Tue May 21 13:32:13 2013 Martin Petriskamac osx 10.6> Hi,

> I would like to use the DRS4 with my macbook
  
  247   Tue May 21 13:25:41 2013 Stefan Rittmac osx 10.6> Hi,

> I would like to use the DRS4 with my macbook
  
  246   Tue May 21 12:39:00 2013 Enrico Contimac osx 10.6Hi,

I would like to use the DRS4 with my macbook
  
  245   Mon May 20 08:42:16 2013 Osip LishilinDRS4- analog pulse counting

    

       
            
  
  244   Wed May 8 19:50:01 2013 Andrey KuznetsovDRS4 installation on Windows 8 issuesI'm also
having trouble installing drivers and running
DRSOsc program on another computer running
  
  243   Wed May 8 06:07:52 2013 Andrey KuznetsovDRS4 v2.0 Eval Board running on higher versions of DRS Oscilloscope programHi,
I have an old v2.0 board that I just
upgraded firmware on using v4.0.0 download
  
  242   Mon Apr 22 15:52:53 2013 Stefan Ritteffect of jitter/alignment between SRCLK and ADC clock

    

       
            
 adc_phase.jpg 
  241   Mon Apr 22 15:33:28 2013 Benjamin LeGeyteffect of jitter/alignment between SRCLK and ADC clockHello!
let me apologize in advance if this
has already been covered somewhere and I
  
  240   Fri Apr 12 08:38:17 2013 Stefan Rittcode/details for optimal DRS4 timing calibration?

    

       
            
  
  239   Fri Apr 12 08:25:05 2013 Stefan Rittcascading -- DRS4 Osci.cpp & DRS.cpp

    

       
            
  
  238   Thu Apr 11 23:32:57 2013 Jill Russekcascading -- DRS4 Osci.cpp & DRS.cpp

    

       
            
  
  237   Thu Apr 11 22:41:13 2013 Bill Ashmanskascode/details for optimal DRS4 timing calibration?Hi Stefan,
Is either some example code or a
detailed written description available for
 tcalib.png 
  236   Thu Apr 11 08:39:12 2013 Stefan Rittcascading -- DRS4 Osci.cpp & DRS.cpp

    

       
            
  
  235   Wed Apr 10 22:41:21 2013 Jill Russekcascading -- DRS4 Osci.cpp & DRS.cpp

    

       
            
  
  234   Mon Apr 8 18:11:02 2013 Dmitry Hitsbinary to root Hi,
 
Does anyone has a program that converts
  
  233   Fri Apr 5 08:54:37 2013 Stefan Rittcascading -- DRS4 Osci.cpp & DRS.cpp

    

       
            
 Screen_Shot_2013-04-05_at_8.51.53_.png 
  232   Fri Apr 5 02:21:33 2013 Jill Russekcascading -- DRS4 Osci.cpp & DRS.cpp

    

       
            
  
  231   Thu Apr 4 11:32:21 2013 Stefan Rittcascading -- DRS4 Osci.cpp & DRS.cpp

    

       
            
  
  230   Thu Apr 4 11:21:04 2013 Stefan RittDifferences in Source Code

    

       
            
  
  229   Tue Mar 26 01:17:59 2013 Jill Russekcascading -- DRS4 Osci.cpp & DRS.cpp 
All I'm trying to do is cascade one
input signal, though all available channels,
  
  228   Mon Mar 25 11:12:53 2013 Georg WinnerDifferences in Source CodeI have noticed some differences in the
source code between Windows (4.0.0) and Linux
(4.0.1) Version.
  
  227   Wed Mar 6 13:08:03 2013 Stefan RittChip Test - Cell Error

    

       
            
  
  226   Wed Mar 6 12:37:14 2013 Stefan RittDRS4- analog pulse counting

    

       
            
  
  225   Wed Mar 6 12:35:38 2013 Osip LishilinDRS4- analog pulse countingHello,
Stefan. Have you implemented pulse counting
yet?
  
  224   Thu Feb 28 12:58:44 2013 Stefan Rittclock and trigger outs> Hi,
> I am considering using the DRS4 evaluation
board as an ADC card for the wire chamber
  
  223   Thu Feb 28 10:47:14 2013 Dmitry Hitsclock and trigger outsHi,
I am considering using the DRS4 evaluation
board as an ADC card for the wire chamber
  
  222   Wed Feb 27 13:47:32 2013 Georg WinnerChip Test - Cell ErrorWhen starting Chip Test in DRS Command
Line Interface, I receive the following message:
Cell error on channel 1, cell
  
  220   Fri Feb 22 11:56:57 2013 Stefan RittDRS4 trigger, different polarity

    

       
            
  
  219   Fri Feb 22 11:46:17 2013 Yury GolodDRS4 trigger, different polarity

Normal
0



  
  218   Wed Feb 13 17:03:53 2013 Stefan RittNonuniform sampling

    

       
            
  
  217   Wed Feb 13 16:58:40 2013 Martin PetriskaNonuniform sampling Are there any plans to include reconstruction
of nonuniform sampling  in DRS4 to get
uniformly sampled data?
  
  216   Tue Feb 5 14:38:35 2013 Stefan Rittvariation of sampling capacitors

    

       
            
  
  215   Fri Feb 1 17:43:48 2013 Jinhong Wangvariation of sampling capacitors

    

       
            
  
  214   Thu Dec 27 18:15:14 2012 Jinhong Wangvariation of sampling capacitors

    

       
            
  
  213   Thu Dec 27 09:49:17 2012 Stefan Rittvariation of sampling capacitors

    

       
            
  
  212   Thu Dec 27 00:12:12 2012 Jinhong Wangvariation of sampling capacitorsHi Stefan,
A quick question, what is the typical
variation of the sampling capacitors in DRS4?
  
  211   Fri Dec 14 21:49:29 2012 Stefan RittEVM rev4 board trigger change and drs_example

    

       
            
  
  210   Fri Dec 14 10:07:54 2012 EvgeniDRS-4 trigger 

    
  
  209   Fri Dec 14 10:07:14 2012 EvgeniDRS-4 trigger 

    
  
  208   Fri Dec 14 08:42:53 2012 Stefan RittDRS-4 trigger

    

       
            
 DRSOsc.png 
  207   Thu Dec 13 19:49:47 2012 EvgeniDRS-4 trigger 

    
  
  206   Thu Dec 13 12:14:35 2012 Stefan RittDRS-4 trigger

    

       
            
  
  205   Thu Dec 13 12:03:29 2012 EvgeniDRS-4 triggerHow to configure DRS oscilloscope for the
oscillations with an amplitude greater than
the value of the exposed
  
  204   Thu Dec 6 09:23:36 2012 Martin PetriskaEVM rev4 board trigger change and drs_example I switched from rev 3 to rev 4 board,
but have some problems with triggering, board
is now waiting for trigger (rev.3 is working).
  
  203   Tue Dec 4 09:55:43 2012 Stefan RittQuestion of drs4 using

    

       
            
  
  202   Tue Dec 4 09:50:11 2012 Zhongwei DuQuestion of drs4 using

    

       
            
  
  201   Tue Dec 4 09:39:44 2012 Stefan RittQuestion of drs4 using

    

       
            
  
  200   Tue Dec 4 09:24:22 2012 Zhongwei DuQuestion of drs4 usingWhen Denable and Dwrite is high , the voltage
of PLLOUT is 0 V.  And  the Dtap
is turn high with no delay when the Denable
  
  199   Mon Dec 3 11:40:35 2012 Gyuhee KimAnother question about using multi boards.

    

       
            
  
  198   Mon Dec 3 09:18:09 2012 Stefan RittAnother question about using multi boards.

    

       
            
  
  197   Mon Dec 3 08:32:28 2012 Gyuhee KimAnother question about using multi boards. Hi.
 
I asked about using multi boards
  
  196   Wed Nov 28 16:54:46 2012 Stefan RittDRS Oscilloscope for Raspberry Pi and Mac OSX 10.8I made a pre-compiled package for Mac OSX
10.8 (Mountain Lion), so one should be able
to install the DRS Oscilloscope software
 screenshot_pi.png 
  195   Wed Nov 21 08:48:00 2012 Gyuhee KimQuestion for using Multi board

    

       
            
  
  194   Wed Nov 21 08:38:26 2012 Stefan RittQuestion for using Multi board

    

       
            
  
  193   Wed Nov 21 08:34:52 2012 Gyuhee KimQuestion for using Multi board Hi.
 
I have 2 DRS4 evaluation V4 boards,
  
  192   Tue Nov 13 11:26:32 2012 Stefan RittGetWave

    

       
            
  
  191   Thu Nov 1 20:46:53 2012 hongwei yangDRS4 firmware

    

       
            
  
  190   Thu Nov 1 20:32:03 2012 Stefan RittDRS4 firmware

    

       
            
 drs4_eval4.vhd 
  189   Thu Nov 1 20:25:53 2012 hongwei yangDRS4 firmware

    

       
            
  
  188   Thu Nov 1 20:21:44 2012 hongwei yangDRS4 firmware

    

       
            
  
  187   Thu Nov 1 20:17:42 2012 Stefan RittDRS4 firmware

    

       
            
 drs4_eval4_app.vhd 
  186   Thu Nov 1 20:08:33 2012 hongwei yangDRS4 firmwareHi,
    We are using drs4
board, but oscilloscope app will somehow
  
  185   Mon Oct 29 18:30:28 2012 Martin PetriskaGetWave I have some question according to
GetWave function. In drs_exam.cpp simple
GetWave(0,0,wave_array[]) etc...is used.
  
  184   Fri Oct 12 14:09:37 2012 Stefan RittDRS abbreviation

    

       
            
  
  183   Fri Oct 12 14:06:04 2012 Moritz von WitzlebenDRS abbreviationHello,
what is the abbreviation of DRS?
Thanks and kind Regards,
  
  182   Thu Oct 4 21:07:27 2012 Zach MillerDRS5

    

       
            
  
  181   Thu Oct 4 20:59:18 2012 Stefan RittDRS5

    

       
            
  
  180   Thu Oct 4 20:50:36 2012 Zach MillerDRS5Hi,
Our group had previously heard that
a "DRS-5.0" might be on the horizon
  
  179   Wed Aug 29 16:57:49 2012 Zach MillerDRS-4.0.0 DOScreen.cpp

    

       
            
  
  178   Wed Aug 29 16:45:36 2012 Stefan RittDRS-4.0.0 DOScreen.cpp

    

       
            
  
  177   Wed Aug 29 16:42:42 2012 Zach MillerDRS-4.0.0 DOScreen.cpp

    

       
            
  
  176   Wed Aug 29 10:52:44 2012 Stefan RittDRS-4.0.0 DOScreen.cpp

    

       
            
  
  175   Tue Aug 28 17:52:45 2012 Zach MillerDRS-4.0.0 DOScreen.cppHi,
I found an old thread regarding a
fix for DOScreen.cpp for DRS-3.1.0, that
  
  174   Mon Aug 6 02:44:00 2012 Stefan RittCalculation of loop filter parameters (R,C1and C1) for 1 GHz

    

       
            
  
  173   Wed Aug 1 17:42:32 2012 Mayank S. RajguruCalculation of loop filter parameters (R,C1and C1) for 1 GHz Hi,
we are planning to use the DRS4 in
our board for 1 GHz sampling and digitization.
  
  172   Wed Jul 11 10:04:51 2012 Ivan PetrovProblem compiling drs_exam.cpp on windows

    

       
            
  
  171   Tue Jul 10 13:15:00 2012 Stefan RittProblem compiling drs_exam.cpp on windows

    

       
            
  
  170   Mon Jul 9 14:14:48 2012 Ivan PetrovProblem compiling drs_exam.cpp on windowsHello again. I have not got evaluation
board yet, but already faced some difficulties:)
I'm trying to compile drs_exam.cpp on Windows
 compile_log.txt 
  169   Mon Jun 25 14:21:13 2012 Stefan Ritttriger for measuring time between pulses in channels

    

       
            
  
  168   Sat Jun 23 00:29:52 2012 Andrey Kuznetsovtriger for measuring time between pulses in channels

    

       
            
  
  167   Wed Jun 20 14:44:38 2012 Stefan Ritttriger for measuring time between pulses in channels

    

       
            
  
  166   Wed Jun 20 14:36:01 2012 Ivan Petrovtriger for measuring time between pulses in channels

    

       
            
  
  165   Wed Jun 20 12:45:05 2012 Stefan Ritttriger for measuring time between pulses in channels

    

       
            
  
  164   Wed Jun 20 10:40:21 2012 Ivan Petrovtriger for measuring time between pulses in channels

    

       
            
  
  163   Wed Apr 25 13:42:37 2012 Stefan RittDRS4 Initialization

    

       
            
  
  162   Mon Apr 23 10:38:51 2012 Guillaume BlanchardDRS4 InitializationHello,
I am writing a VHDL code to drive
a DRS4 chip.
  
  161   Wed Mar 21 09:39:33 2012 Stefan Ritttriger for measuring time between pulses in channels

    

       
            
  
  160   Wed Mar 21 09:33:00 2012 Martin Petriskatriger for measuring time between pulses in channels

    

       
            
  
  159   Tue Mar 20 16:33:50 2012 Stefan Ritttriger for measuring time between pulses in channels

    

       
            
  
  158   Tue Mar 20 16:23:33 2012 Martin Petriskatriger for measuring time between pulses in channels I have two BaF2 detectors with PMT
connected to Ch1 and Ch2. At this time Im
using external triger module to start DRS4.
  
  157   Thu Mar 1 19:22:26 2012 Stefan RittDRS4- analog pulse counting

    

       
            
  
  156   Wed Feb 29 06:46:47 2012 SonalDRS4- analog pulse counting


   
        
            
  
  155   Fri Feb 24 15:52:43 2012 Stefan RittDRS4- analog pulse counting

    

       
            
  
  154   Wed Feb 22 11:36:51 2012 sonalDRS4- analog pulse countingHello
Sir,
  
  153   Wed Feb 15 18:08:13 2012 Yuji IwaiEvaluation Board v4 Trigger/Clock ConnectorsQuick question - what type of connectors
are used for the trigger and clock in/out
on the v4 eval board?
  
  152   Mon Feb 6 08:15:38 2012 Stefan Rittwhat sort of detectors for physical experiment the DRS4 used?

    

       
            
  
  151   Sat Feb 4 11:59:26 2012 Zhongwei Duwhat sort of detectors for physical experiment the DRS4 used?Hello.
We are designing a waveform
sampling board for Si strip array detector
  
  150   Tue Jan 31 08:10:37 2012 Stefan RittIEEE Real Time 2012 Call for AbstractsHello,
I'm co-organizing the upcoming Real
Time Conference, which covers also fields
  
  149   Thu Jan 26 10:05:57 2012 Ravindra Raghunath ShindeDRS4 Rev2.0 for analog pulse counting


   
        
            
  
  148   Thu Jan 26 09:49:38 2012 Stefan RittDRS4 Rev2.0 for analog pulse counting

    

       
            
  
  147   Thu Jan 26 09:44:34 2012 Ravindra Raghunath ShindeDRS4 Rev2.0 for analog pulse counting


   
        
            
  
  146   Thu Jan 26 09:15:42 2012 Stefan RittDRS4 Rev2.0 for analog pulse counting

    

       
            
  
  145   Thu Jan 26 09:12:03 2012 Ravindra Raghunath ShindeDRS4 Rev2.0 for analog pulse countingHello,
We are using DRS4 Rev.2.0 board.
We want to measure number of pulses
  
  144   Fri Jan 20 23:50:39 2012 Heejong Kimdrs_exam.cpp for evaluation board version 4

    

       
            
  
  143   Fri Jan 20 08:09:38 2012 Stefan Rittdrs_exam.cpp for evaluation board version 4

    

       
            
 drs_exam.cpp 
  142   Thu Jan 19 23:26:26 2012 Heejong Kimdrs_exam.cpp for evaluation board version 4Hello,
I'm using DRS4 evaluation board version4
in Linux (Scientific Linux 5).
  
  141   Wed Dec 14 08:55:29 2011 Stefan RittSynchronization Delay in the Firmware for 8051 Controller

    

       
            
  
  140   Wed Dec 14 00:44:37 2011 Hao HuanSynchronization Delay in the Firmware for 8051 ControllerHi Stefan,
    I have a question
regarding the DRS 4 evaluation board firmware
  
  139   Mon Dec 12 16:43:04 2011 Stefan RittDC coupled DRS4 input stageIn the attachement you will find a working
DC-coupled input stage to the DRS4 chip.
The bandwidth of this design is about 700
 DRS4_front_end_DC.pdf 
  138   Fri Dec 9 17:45:48 2011 Michael BkerFixes to DOScreen.cpp for recent built on linux> I was just building version 3.1.0 and ran
into some problems in DOScreen.cpp.  Basically
the conversions from
  
  137   Tue Nov 1 11:07:02 2011 Stefan RittHow to link PMT

    

       
            
  
  136   Mon Oct 31 09:15:02 2011 Zhongwei DuHow to link PMTI want to measure the signal from PMT .
But it is a current signal, should i just
put a series resistance, or use a amplifier
  
  135   Mon Oct 24 10:30:15 2011 Stefan RittPhase Shift for ADC Readout

    

       
            
  
  134   Sun Oct 23 23:32:28 2011 Hao HuanPhase Shift for ADC ReadoutDear Dr. Ritt,
    In the DRS 4 datasheet
it is recommended to sample the analog output
  
  133   Sat Oct 22 00:40:02 2011 Stefan RittDRS4 eval board: readout rate

    

       
            
  
  132   Sat Oct 15 04:45:25 2011 Aurelien BouvierDRS4 eval board: readout rateHi,
Our setup uses a DRS4 evaluation
board (version 2.0).
  
  131   Mon Sep 19 08:53:22 2011 Stefan Rittcompilation error for version 4.0.0 on linux

    

       
            
  
  130   Fri Sep 16 22:06:07 2011 Andriy Zatserklyaniycompilation error for version 4.0.0 on linuxHi Stefan,
When I compiled DRS4 software version
4.0.0 on Linux (Debian Squeeze) I got this
  
  129   Fri Sep 9 09:31:33 2011 Stefan RittDRS4 and AD9222

    

       
            
  
  128   Fri Sep 9 09:28:57 2011 Guillaume BlanchardDRS4 and AD9222Thank you for your
answers,
  
  127   Wed Sep 7 17:28:25 2011 Hannes FriederichDRS4 and AD9222

    

       
            
  
  126   Wed Sep 7 16:56:43 2011 Stefan RittDRS4 and AD9222

    

       
            
  
  125   Wed Sep 7 16:45:17 2011 Guillaume BlanchardDRS4 and AD9222

Normal
0
21


false
false
false



  
  124   Wed Jul 13 04:26:52 2011 Stefan RittFixed Patter Timing Jitter

    

       
            
  
  123   Tue Jul 12 09:49:08 2011 Jinhong WangFixed Patter Timing Jitter

    

       
            
 131MHz.jpg 
  122   Tue Jul 5 10:09:43 2011 Stefan RittFixed Patter Timing Jitter

    

       
            
 nonlinearity.png 
  121   Mon Jul 4 05:06:00 2011 Jinhong WangFixed Patter Timing Jitter

    

       
            
 hist_stoppos.jpg 
  120   Thu Jun 2 21:01:29 2011 Stefan RittRemoving spikes

    

       
            
  
  119   Wed Jun 1 09:57:43 2011 Martin PetriskaRemoving spikesI have DSR4 eval board. Found that there
are spikes in channels. Procedure Osc::RemoveSpikes
to remove them looks litlle dificult. There
  
  118   Fri Apr 15 08:28:54 2011 Stefan RittFixes to DOScreen.cpp for recent built on linux> Hello,

> I was just building version 3.1.0 and ran
  
  117   Thu Apr 14 18:23:53 2011 Bob HiroskyFixes to DOScreen.cpp for recent built on linuxHello,

I was just building version 3.1.0 and ran
  
  116   Fri Feb 25 10:13:51 2011 Stefan RittAnnouncement digital pulse processing workshopDear colleague,
if you live not so far from Zurich,
you might be interested in this workshop:
  
  115   Mon Feb 21 12:42:33 2011 S S Upadhyahow to synchronize Sampling frequency of two evaluation boards

    

       
            
  
  114   Mon Feb 21 08:10:31 2011 Stefan Ritthow to synchronize Sampling frequency of two evaluation boards

    

       
            
  
  113   Sat Feb 19 22:46:35 2011 Stefan Ritthow to synchronize Sampling frequency of two evaluation boards

    

       
            
  
  112   Sat Feb 19 17:25:29 2011 S S Upadhyahow to synchronize Sampling frequency of two evaluation boards Dear sir,
We have two evaluation boards of
DRS4. We would like to use 8 inputs to be
  
  111   Tue Nov 16 16:38:06 2010 Stefan RittReference design for DRS4 active input buffer

    

       
            
  
  110   Tue Oct 12 03:53:37 2010 Jinhong WangReference design for DRS4 active input buffer

    

       
            
  
  107   Wed Jul 21 10:58:20 2010 Stefan Ritt ENOB of DRS

    

       
            
  
  106   Wed Jul 21 10:46:32 2010 Jinhong Wang ENOB of DRS Hi, Stefan, I see in your ppt "Design
and performance of 6 GSPS waveform digitizing
chip DRS4" , you define DRS4 ENOB as
  
  105   Mon Jul 19 12:47:17 2010 Stefan RittFixed Patter Timing Jitter

    

       
            
 Capture.png 
  104   Mon Jul 19 12:07:04 2010 Jinhong WangFixed Patter Timing Jitter Hi Stefan, can you give some suggestions
on determination of fixed pattern timing
jitter of DRS4?  Thanks~
  
  99   Mon Jul 12 16:07:37 2010 Stefan RittAnnouncement evaluation board V3Dear DRS4 users,
a new version of the evaluation board
has been designed and is in production now.
 eval3.png 
  98   Tue Jun 22 11:37:42 2010 Jinhong WangReset of DRS4

    

       
            
  
  97   Tue Jun 22 11:35:18 2010 Stefan RittReset of DRS4

    

       
            
  
  96   Tue Jun 22 11:29:26 2010 Jinhong WangReset of DRS4

    

       
            
  
  95   Tue Jun 22 11:02:30 2010 Stefan RittReset of DRS4

    

       
            
  
  94   Tue Jun 22 10:50:19 2010 Jinhong WangReset of DRS4 Hi Stefan, 
      I found
DRS draw a lot of current when applied Reset
  
  93   Sat Jun 19 10:09:18 2010 Jinhong WangDVDD Problem of DRS 4

    

       
            
  
  92   Fri Jun 18 11:45:18 2010 Stefan RittDVDD Problem of DRS 4

    

       
            
  
  91   Fri Jun 18 11:31:20 2010 Jinhong WangDVDD Problem of DRS 4

    

       
            
  
  88   Tue Jun 1 13:36:18 2010 Stefan RittHigh Frequency Input for DRS

    

       
            
  
  87   Wed May 26 19:18:09 2010 Hao HuanHigh Frequency Input for DRSHi Stefan,
    I read in the
DRS datasheet that the bandwidth for the
  
  86   Wed May 19 09:16:02 2010 Stefan RittDVDD Problem of DRS 4

    

       
            
  
  85   Wed May 19 02:24:12 2010 Hao HuanDVDD Problem of DRS 4


   
        
            
  
  84   Tue May 18 09:24:02 2010 Stefan RittReference design for DRS4 active input bufferThe design of high frequency differential
input stages with the DRS4 is a challenge,
since the chip draws quite some current at
 ac.pngac_bw.pngdc.pngdc_bw.pngDRS4_ft_V3.jpg 
  83   Tue May 18 08:23:07 2010 Stefan RittDVDD Problem of DRS 4

    

       
            
  
  82   Tue May 18 01:47:59 2010 Hao HuanDVDD Problem of DRS 4


   
        
            
  
  81   Fri May 14 08:40:14 2010 Stefan RittDVDD Problem of DRS 4

    

       
            
  
  80   Thu May 13 19:14:27 2010 Hao HuanDVDD Problem of DRS 4Hi Stefan,
    on our board some
DRS chips draw a lot of current through DVDD
  
  79   Wed May 12 16:26:12 2010 Stefan RittDRS4 chip model

    

       
            
  
  78   Wed May 12 11:47:39 2010 Jinhong WangDRS4 chip model
  
  77   Thu May 6 08:15:39 2010 Stefan RittRandom noise spec in datasheet

    

       
            
  
  76   Wed May 5 22:30:50 2010 Ignacio Diguez EstremeraRandom noise spec in datasheetHi,
According to DRS4's datasheet, the
random noise is 0.35mVrms. Is this the input
  
  75   Tue May 4 16:23:16 2010 Ignacio Diguez EstremeraDRS4 chip model

    
        
  
  74   Tue May 4 11:26:21 2010 Stefan RittDRS4 chip model

    

       
            
 DRS4_S-Parameter.pdf 
  73   Mon May 3 23:21:55 2010 Ignacio Diguez EstremeraDRS4 chip model

    
        
  
  72   Mon May 3 17:10:29 2010 Stefan RittDRS4 chip model

    

       
            
  
  71   Mon May 3 17:06:02 2010 Ignacio Diguez EstremeraDRS4 chip model

    
        
  
  70   Mon May 3 11:09:12 2010 Stefan RittDRS4 chip model

    

       
            
  
  69   Sun May 2 18:36:14 2010 Ignacio Diguez EstremeraDRS4 chip modelHi all,
i'm an electronics engineering student
at UCM (Madrid) working on my master's thesis
  
  68   Thu Apr 15 13:48:40 2010 Stefan RittROFS Configuration

    

       
            
  
  67   Wed Apr 14 16:34:28 2010 Stefan Rittversion 1.2 evaluation board with firmware 13279?

    

       
            
  
  66   Tue Apr 13 14:15:16 2010 Stefan RittSimple example application to read a DRS evaluation board

    

       
            
  
  65   Tue Apr 13 13:56:07 2010 Stefan RittBaseline Variation In Data

    

       
            
  
  64   Tue Apr 13 13:12:43 2010 Stefan Rittevaluation board used like a counter

    

       
            
  
  63   Tue Apr 13 10:45:18 2010 lorenzo nerievaluation board used like a counterHi all

  
  62   Fri Apr 9 17:14:45 2010 Hao HuanBaseline Variation In DataHi Stefan,
    when I sample
a constant input with the DRS 4 chip, there
  
  61   Mon Apr 5 17:57:41 2010 Heejong KimSimple example application to read a DRS evaluation board


   
        
            
  
  60   Mon Apr 5 17:50:39 2010 Heejong Kimversion 1.2 evaluation board with firmware 13279?
Hi, Stefan,

I found that my collaborator
bought 2 older version of evaluation board
before.
They are the version 1.2 in plastics
  
  59   Tue Mar 30 22:57:34 2010 Hao HuanROFS ConfigurationHi Stefan,
    according to the
DRS4 datasheet, if we want an input range
  
  58   Mon Mar 22 09:12:19 2010 Stefan RittPLL Loop Filter Configuration

    

       
            
  
  57   Sun Mar 21 02:03:44 2010 Hao HuanPLL Loop Filter ConfigurationHi Stefan,
    in the datasheet
it says at 6GSPS the typical loop filter
  
  56   Thu Mar 18 22:10:41 2010 Stefan RittSerial Interface Frequency of the DRS Chip

    

       
            
  
  55   Thu Mar 18 21:38:10 2010 Hao HuanSerial Interface Frequency of the DRS Chip


   
        
            
  
  54   Fri Mar 12 08:04:44 2010 Stefan RittInput Bandwidth of the DRS Chip

    

       
            
  
  53   Thu Mar 11 21:37:32 2010 Hao HuanInput Bandwidth of the DRS ChipHi Stefan,
    I read in the
DRS datasheet that the input bandwidth if
  
  52   Thu Mar 11 11:45:52 2010 Stefan RittReadout of DRS Data

    

       
            
  
  51   Wed Mar 10 10:07:28 2010 Stefan RittSerial Interface Frequency of the DRS Chip

    

       
            
  
  50   Tue Mar 9 23:28:45 2010 Hao HuanSerial Interface Frequency of the DRS ChipHi Stefan,
    in the DRS4 datasheet
I read that the optimal frequency for SRCLK
  
  49   Fri Mar 5 23:29:04 2010 Hao HuanReadout of DRS Data


   
        
            
  
  48   Thu Mar 4 19:14:10 2010 Hao HuanReadout of DRS DataHi Stefan,
    thanks to your
help I can now successfully keep the Domino
  
  47   Wed Mar 3 17:49:30 2010 Stefan RittInitialization of the Domino Circuit

    

       
            
  
  46   Wed Mar 3 17:36:31 2010 Hao HuanInitialization of the Domino CircuitHi Stefan,
    I read in the
datasheet that every time after power up
  
  45   Wed Mar 3 14:37:40 2010 Stefan RittPLLLCK signal of DRS4

    

       
            
  
  44   Mon Feb 22 17:23:59 2010 Hao HuanPLLLCK signal of DRS4


   
        
            
  
  43   Sun Feb 21 20:33:57 2010 Stefan RittPLLLCK signal of DRS4

    

       
            
  
  42   Sun Feb 21 20:27:46 2010 Hao HuanPLLLCK signal of DRS4


   
        
            
  
  41   Sun Feb 21 13:47:03 2010 Stefan RittPLLLCK signal of DRS4

    

       
            
  
  40   Sun Feb 21 13:41:35 2010 Stefan RittReal Time Conference 2010Hello,
may I draw your attention to the
upcoming Real Time Conference 2010, taking
  
  39   Sun Feb 21 00:46:01 2010 Hao HuanPLLLCK signal of DRS4


   
        
            
  
  38   Sat Feb 20 09:54:48 2010 Stefan RittPLLLCK signal of DRS4


   
        
            
 start_1ghz.png 
  37   Sat Feb 20 01:56:05 2010 Hao HuanPLLLCK signal of DRS4Hi Stefan,
    in the latest
DRS4 datasheet I only saw your data of the
  
  36   Tue Feb 16 09:38:59 2010 Stefan RittProblem reading oscilloscope binary waveform output

    

       
            
  
  35   Mon Feb 15 19:43:34 2010 Ron GraziosoProblem reading oscilloscope binary waveform outputI have saved some waveforms using the oscilloscope
application in both binary and xml. 
I can see that the xml file gives me proper
 test_pulse.pngpulse_IDL.png 
  34   Wed Feb 10 15:35:09 2010 Stefan RittHello

    

       
            
  
  33   Wed Feb 10 02:57:55 2010 pepe sanchez lopezHellohello i am an student and i want to do
my final project with drs4 board and i really
can´t find how to open waveform file
  
  32   Mon Feb 1 08:30:42 2010 Stefan RittFailure In Flashing Xilinx PROM

    

       
            
 DRS.cppDRS.hdrs4_eval1.mcs 
  31   Sun Jan 31 23:52:15 2010 Hao HuanFailure In Flashing Xilinx PROMHi Stefan,
    I have an old-version
DRS4 evaluation board which doesn't have
  
  30   Mon Jan 11 16:32:21 2010 Stefan Rittnormal_mode_in_drs_exam.cpp

    

       
            
  
  29   Wed Dec 30 14:28:33 2009 aliyilmaznormal_mode_in_drs_exam.cpp Dear Mr. S. Ritt
       i am Ms.
student , am working with your DRS4 board
  
  28   Tue Dec 22 09:07:27 2009 Stefan RittTrigger of DRS4

    

       
            
  
  27   Tue Dec 22 01:30:55 2009 Jinhong WangTrigger of DRS4
  
  26   Mon Dec 21 16:52:08 2009 Stefan RittTrigger of DRS4

    

       
            
  
  25   Mon Dec 21 10:17:05 2009 Jinhong WangTrigger of DRS4
  
  24   Tue Dec 15 14:38:09 2009 Stefan RittTrigger of DRS4

    

       
            
  
  23   Mon Dec 14 10:14:16 2009 Jinhong WangTrigger of DRS4Dear Mr. S. Ritt
     The
following is my confusion about the
  
  22   Wed Nov 4 14:42:22 2009 Stefan Rittoutline dimension of DRS4

    

       
            
 qfn76.png 
  21   Fri Oct 30 03:31:54 2009 Jinhong Wangoutline dimension of DRS4   QFN_package.jpg 
  20   Mon Oct 19 12:46:12 2009 Stefan Rittoutput common mode voltage of DRS4

    

       
            
  
  19   Mon Oct 19 11:26:29 2009 Jinhong Wangoutput common mode voltage of DRS4Hello Mr.
Stifan.Ritt
       In
the DSR4 datasheet, it is mentioned that
  
  18   Mon Oct 19 09:13:00 2009 Stefan RittBIAS Pin of DRS4

    

       
            
  
  17   Mon Oct 19 09:06:43 2009 Jinhong WangBIAS Pin of DRS4Dear Mr. Stefan Ritt.
        
Thank u for your timely response on "DSR4
  
  16   Fri Oct 16 10:16:10 2009 Stefan RittDSR4 Full Readout Mode

    

       
            
  
  15   Fri Oct 16 09:51:03 2009 Jinhong WangDSR4 Full Readout ModeHello Mr. Stefan Ritt
         
In DSR4 DATASHEET Rev.0.8 Page13, I noticed
  
  14   Wed Oct 14 23:53:05 2009 Armin KolbDRS_exam using USB Evaluation Board with OS XFor the users using a Macintosh,
after several hours the Evaluation
Board is working  on my Macintosh (intel).
 Makefile 
  13   Wed Oct 7 17:58:20 2009 Stefan RittVDD switch off speedIt turned out that the VDD switch off speed
plays some important role. On our VME board,
we have a linear regulator, then a 4.7 uF
 no_res.png100ohm.png 
  12   Tue Oct 6 11:20:39 2009 Stefan RittVDD instabilityIt has turned out that the stability of
the AVDD and DVDD power supplies for the
DRS4 are very critical. On the evaluation
 vdd_no_cap.pngvdd_470uf.png 
  11   Thu Jul 9 09:11:03 2009 Stefan RittCurrent problems with drs_exam.cppThe current version of the DRS readout
example program drs_exam.cpp has two problems:

    The sampling frequency
  
  10   Tue Jul 7 16:39:57 2009 Stefan RittPower up problem and remedyMaybe some of you have experienced that
the DRS4 chip can get pretty hot after power
up. After it's initialized the first time,
 typical_mode.gif 
  9   Wed Jun 10 12:46:43 2009 Stefan RittInput range switch added in Version 2.1.3 A new software verison for the DRS4
Evaluation Board has been has been released.
Version 2.1.3 adds a switch for the input
 Capture.png 
  8   Wed Apr 29 07:57:33 2009 Stefan RittSimple example application to read a DRS evaluation board 

    
 DRS.cppDRS.h 
  7   Tue Apr 28 11:44:07 2009 Stefan RittSimple example application to read a DRS evaluation boardSeveral people asked for s simple application
to guide them in writing their own application
to read out a DRS board. Such an application
 drs_exam.cpp 
  6   Mon Apr 27 15:09:49 2009 Stefan RittAmplitude and Timing calibration for DRS4 Evaluation BoardThis is a quick notification to all users
of the current DRS4 evaluation board.
As you all know, the DRS4 chip needs
 uncal.pngcal.png 
  5   Mon Feb 23 09:24:24 2009 Stefan RittRise-time measurementsMany applications using the DRS4 need to
measure fast rising signals, like for PMTs
or MCPs. This short note shows the minimal
 image001.jpgimage003.jpgsingle.jpg 
  4   Wed Feb 11 12:21:07 2009 Stefan RittCorrected datasheet Rev. 0.8 Please note the new datasheet Rev.
0.8 available from the DRS web site. It fixes
the label of pin #76, which was AGND but
  
  3   Wed Jan 14 13:41:44 2009 Stefan RittExternal Trigger Input requirements 
Another tricky issue comes from the
fact that the external TTL trigger and the
  
  2   Wed Jan 14 12:02:04 2009 Stefan RittExternal Trigger Input requirementsSeveral people mentioned that the external
trigger input (TTL) does not work on the
DRS4 Evaluation Board Rev. 1.1. This is not
 tap.jpg 
  1   Mon Dec 15 13:37:38 2008 Stefan RittWelcome Welcome to the DRS4 Discussion Forum.
This forum contains information and discussions
related to the DRS4 chip. Please subscribe
  
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